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@@ -430,8 +430,7 @@ static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
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/* Always disable the PLL - it is not safe to leave it running
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* while reprogramming it.
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*/
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- reg = snd_soc_read(codec, WM8580_PWRDN2);
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- snd_soc_write(codec, WM8580_PWRDN2, reg | pwr_mask);
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+ snd_soc_update_bits(codec, WM8580_PWRDN2, pwr_mask, pwr_mask);
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if (!freq_in || !freq_out)
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return 0;
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@@ -449,8 +448,7 @@ static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
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snd_soc_write(codec, WM8580_PLLA4 + offset, reg);
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/* All done, turn it on */
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- reg = snd_soc_read(codec, WM8580_PWRDN2);
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- snd_soc_write(codec, WM8580_PWRDN2, reg & ~pwr_mask);
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+ snd_soc_update_bits(codec, WM8580_PWRDN2, pwr_mask, 0);
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return 0;
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}
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@@ -748,7 +746,6 @@ static int wm8580_digital_mute(struct snd_soc_dai *codec_dai, int mute)
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static int wm8580_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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- u16 reg;
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switch (level) {
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case SND_SOC_BIAS_ON:
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case SND_SOC_BIAS_PREPARE:
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@@ -757,20 +754,19 @@ static int wm8580_set_bias_level(struct snd_soc_codec *codec,
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case SND_SOC_BIAS_STANDBY:
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if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
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/* Power up and get individual control of the DACs */
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- reg = snd_soc_read(codec, WM8580_PWRDN1);
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- reg &= ~(WM8580_PWRDN1_PWDN | WM8580_PWRDN1_ALLDACPD);
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- snd_soc_write(codec, WM8580_PWRDN1, reg);
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+ snd_soc_update_bits(codec, WM8580_PWRDN1,
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+ WM8580_PWRDN1_PWDN |
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+ WM8580_PWRDN1_ALLDACPD, 0);
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/* Make VMID high impedance */
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- reg = snd_soc_read(codec, WM8580_ADC_CONTROL1);
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- reg &= ~0x100;
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- snd_soc_write(codec, WM8580_ADC_CONTROL1, reg);
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+ snd_soc_update_bits(codec, WM8580_ADC_CONTROL1,
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+ 0x100, 0);
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}
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break;
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case SND_SOC_BIAS_OFF:
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- reg = snd_soc_read(codec, WM8580_PWRDN1);
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- snd_soc_write(codec, WM8580_PWRDN1, reg | WM8580_PWRDN1_PWDN);
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+ snd_soc_update_bits(codec, WM8580_PWRDN1,
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+ WM8580_PWRDN1_PWDN, WM8580_PWRDN1_PWDN);
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break;
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}
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codec->dapm.bias_level = level;
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