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@@ -742,26 +742,20 @@ static int wm8900_set_fll(struct snd_soc_codec *codec,
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{
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struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
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struct _fll_div fll_div;
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- unsigned int reg;
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if (wm8900->fll_in == freq_in && wm8900->fll_out == freq_out)
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return 0;
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/* The digital side should be disabled during any change. */
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- reg = snd_soc_read(codec, WM8900_REG_POWER1);
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- snd_soc_write(codec, WM8900_REG_POWER1,
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- reg & (~WM8900_REG_POWER1_FLL_ENA));
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+ snd_soc_update_bits(codec, WM8900_REG_POWER1,
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+ WM8900_REG_POWER1_FLL_ENA, 0);
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/* Disable the FLL? */
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if (!freq_in || !freq_out) {
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- reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
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- snd_soc_write(codec, WM8900_REG_CLOCKING1,
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- reg & (~WM8900_REG_CLOCKING1_MCLK_SRC));
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-
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- reg = snd_soc_read(codec, WM8900_REG_FLLCTL1);
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- snd_soc_write(codec, WM8900_REG_FLLCTL1,
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- reg & (~WM8900_REG_FLLCTL1_OSC_ENA));
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-
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+ snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
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+ WM8900_REG_CLOCKING1_MCLK_SRC, 0);
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+ snd_soc_update_bits(codec, WM8900_REG_FLLCTL1,
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+ WM8900_REG_FLLCTL1_OSC_ENA, 0);
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wm8900->fll_in = freq_in;
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wm8900->fll_out = freq_out;
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@@ -796,15 +790,14 @@ static int wm8900_set_fll(struct snd_soc_codec *codec,
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else
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snd_soc_write(codec, WM8900_REG_FLLCTL6, 0);
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- reg = snd_soc_read(codec, WM8900_REG_POWER1);
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- snd_soc_write(codec, WM8900_REG_POWER1,
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- reg | WM8900_REG_POWER1_FLL_ENA);
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+ snd_soc_update_bits(codec, WM8900_REG_POWER1,
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+ WM8900_REG_POWER1_FLL_ENA,
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+ WM8900_REG_POWER1_FLL_ENA);
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reenable:
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- reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
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- snd_soc_write(codec, WM8900_REG_CLOCKING1,
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- reg | WM8900_REG_CLOCKING1_MCLK_SRC);
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-
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+ snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
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+ WM8900_REG_CLOCKING1_MCLK_SRC,
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+ WM8900_REG_CLOCKING1_MCLK_SRC);
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return 0;
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}
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@@ -818,43 +811,35 @@ static int wm8900_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
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int div_id, int div)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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- unsigned int reg;
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switch (div_id) {
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case WM8900_BCLK_DIV:
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- reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
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- snd_soc_write(codec, WM8900_REG_CLOCKING1,
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- div | (reg & ~WM8900_REG_CLOCKING1_BCLK_MASK));
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+ snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
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+ WM8900_REG_CLOCKING1_BCLK_MASK, div);
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break;
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case WM8900_OPCLK_DIV:
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- reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
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- snd_soc_write(codec, WM8900_REG_CLOCKING1,
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- div | (reg & ~WM8900_REG_CLOCKING1_OPCLK_MASK));
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+ snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
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+ WM8900_REG_CLOCKING1_OPCLK_MASK, div);
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break;
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case WM8900_DAC_LRCLK:
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- reg = snd_soc_read(codec, WM8900_REG_AUDIO4);
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- snd_soc_write(codec, WM8900_REG_AUDIO4,
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- div | (reg & ~WM8900_LRC_MASK));
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+ snd_soc_update_bits(codec, WM8900_REG_AUDIO4,
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+ WM8900_LRC_MASK, div);
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break;
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case WM8900_ADC_LRCLK:
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- reg = snd_soc_read(codec, WM8900_REG_AUDIO3);
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- snd_soc_write(codec, WM8900_REG_AUDIO3,
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- div | (reg & ~WM8900_LRC_MASK));
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+ snd_soc_update_bits(codec, WM8900_REG_AUDIO3,
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+ WM8900_LRC_MASK, div);
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break;
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case WM8900_DAC_CLKDIV:
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- reg = snd_soc_read(codec, WM8900_REG_CLOCKING2);
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- snd_soc_write(codec, WM8900_REG_CLOCKING2,
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- div | (reg & ~WM8900_REG_CLOCKING2_DAC_CLKDIV));
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+ snd_soc_update_bits(codec, WM8900_REG_CLOCKING2,
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+ WM8900_REG_CLOCKING2_DAC_CLKDIV, div);
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break;
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case WM8900_ADC_CLKDIV:
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- reg = snd_soc_read(codec, WM8900_REG_CLOCKING2);
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- snd_soc_write(codec, WM8900_REG_CLOCKING2,
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- div | (reg & ~WM8900_REG_CLOCKING2_ADC_CLKDIV));
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+ snd_soc_update_bits(codec, WM8900_REG_CLOCKING2,
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+ WM8900_REG_CLOCKING2_ADC_CLKDIV, div);
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break;
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case WM8900_LRCLK_MODE:
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- reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
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- snd_soc_write(codec, WM8900_REG_DACCTRL,
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- div | (reg & ~WM8900_REG_DACCTRL_AIF_LRCLKRATE));
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+ snd_soc_update_bits(codec, WM8900_REG_DACCTRL,
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+ WM8900_REG_DACCTRL_AIF_LRCLKRATE, div);
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break;
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default:
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return -EINVAL;
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@@ -1037,12 +1022,12 @@ static int wm8900_set_bias_level(struct snd_soc_codec *codec,
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switch (level) {
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case SND_SOC_BIAS_ON:
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/* Enable thermal shutdown */
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- reg = snd_soc_read(codec, WM8900_REG_GPIO);
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- snd_soc_write(codec, WM8900_REG_GPIO,
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- reg | WM8900_REG_GPIO_TEMP_ENA);
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- reg = snd_soc_read(codec, WM8900_REG_ADDCTL);
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- snd_soc_write(codec, WM8900_REG_ADDCTL,
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- reg | WM8900_REG_ADDCTL_TEMP_SD);
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+ snd_soc_update_bits(codec, WM8900_REG_GPIO,
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+ WM8900_REG_GPIO_TEMP_ENA,
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+ WM8900_REG_GPIO_TEMP_ENA);
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+ snd_soc_update_bits(codec, WM8900_REG_ADDCTL,
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+ WM8900_REG_ADDCTL_TEMP_SD,
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+ WM8900_REG_ADDCTL_TEMP_SD);
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break;
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case SND_SOC_BIAS_PREPARE:
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@@ -1205,26 +1190,16 @@ static int wm8900_probe(struct snd_soc_codec *codec)
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wm8900_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
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/* Latch the volume update bits */
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- snd_soc_write(codec, WM8900_REG_LINVOL,
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- snd_soc_read(codec, WM8900_REG_LINVOL) | 0x100);
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- snd_soc_write(codec, WM8900_REG_RINVOL,
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- snd_soc_read(codec, WM8900_REG_RINVOL) | 0x100);
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- snd_soc_write(codec, WM8900_REG_LOUT1CTL,
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- snd_soc_read(codec, WM8900_REG_LOUT1CTL) | 0x100);
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- snd_soc_write(codec, WM8900_REG_ROUT1CTL,
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- snd_soc_read(codec, WM8900_REG_ROUT1CTL) | 0x100);
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- snd_soc_write(codec, WM8900_REG_LOUT2CTL,
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- snd_soc_read(codec, WM8900_REG_LOUT2CTL) | 0x100);
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- snd_soc_write(codec, WM8900_REG_ROUT2CTL,
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- snd_soc_read(codec, WM8900_REG_ROUT2CTL) | 0x100);
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- snd_soc_write(codec, WM8900_REG_LDAC_DV,
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- snd_soc_read(codec, WM8900_REG_LDAC_DV) | 0x100);
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- snd_soc_write(codec, WM8900_REG_RDAC_DV,
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- snd_soc_read(codec, WM8900_REG_RDAC_DV) | 0x100);
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- snd_soc_write(codec, WM8900_REG_LADC_DV,
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- snd_soc_read(codec, WM8900_REG_LADC_DV) | 0x100);
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- snd_soc_write(codec, WM8900_REG_RADC_DV,
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- snd_soc_read(codec, WM8900_REG_RADC_DV) | 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_LINVOL, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_RINVOL, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_LOUT1CTL, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_ROUT1CTL, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_LOUT2CTL, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_ROUT2CTL, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_LDAC_DV, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_RDAC_DV, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_LADC_DV, 0x100, 0x100);
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+ snd_soc_update_bits(codec, WM8900_REG_RADC_DV, 0x100, 0x100);
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/* Set the DAC and mixer output bias */
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snd_soc_write(codec, WM8900_REG_OUTBIASCTL, 0x81);
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