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@@ -3788,7 +3788,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_ring_buffer *ring;
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- u32 gtfifodbg, val;
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+ u32 gtfifodbg, val, rc6_mode = 0;
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int i;
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WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
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@@ -3828,8 +3828,9 @@ static void valleyview_enable_rps(struct drm_device *dev)
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/* allows RC6 residency counter to work */
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I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
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- I915_WRITE(GEN6_RC_CONTROL,
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- GEN7_RC_CTL_TO_MODE);
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+ if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
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+ rc6_mode = GEN7_RC_CTL_TO_MODE;
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+ I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
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val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
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switch ((val >> 6) & 3) {
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