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@@ -406,32 +406,15 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
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writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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}
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}
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-static int ahci_start_engine(void __iomem *port_mmio)
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+static void ahci_start_engine(void __iomem *port_mmio)
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{
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{
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u32 tmp;
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u32 tmp;
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- /* get current status */
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- tmp = readl(port_mmio + PORT_CMD);
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-
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- /* AHCI rev 1.1 section 10.3.1:
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- * Software shall not set PxCMD.ST to '1' until it verifies
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- * that PxCMD.CR is '0' and has set PxCMD.FRE to '1'
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- */
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- if ((tmp & PORT_CMD_FIS_RX) == 0)
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- return -EPERM;
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-
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- /* wait for engine to become idle */
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- tmp = ata_wait_register(port_mmio + PORT_CMD,
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- PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1,500);
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- if (tmp & PORT_CMD_LIST_ON)
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- return -EBUSY;
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-
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/* start DMA */
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/* start DMA */
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+ tmp = readl(port_mmio + PORT_CMD);
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tmp |= PORT_CMD_START;
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tmp |= PORT_CMD_START;
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writel(tmp, port_mmio + PORT_CMD);
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writel(tmp, port_mmio + PORT_CMD);
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readl(port_mmio + PORT_CMD); /* flush */
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readl(port_mmio + PORT_CMD); /* flush */
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-
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- return 0;
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}
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}
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static int ahci_stop_engine(void __iomem *port_mmio)
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static int ahci_stop_engine(void __iomem *port_mmio)
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