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@@ -1,13 +1,11 @@
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#ifndef _ASM_X86_MMU_CONTEXT_64_H
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#define _ASM_X86_MMU_CONTEXT_64_H
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-#include <asm/pda.h>
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-
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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#ifdef CONFIG_SMP
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- if (read_pda(mmu_state) == TLBSTATE_OK)
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- write_pda(mmu_state, TLBSTATE_LAZY);
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+ if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
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+ percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
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#endif
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}
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@@ -19,8 +17,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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/* stop flush ipis for the previous mm */
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cpu_clear(cpu, prev->cpu_vm_mask);
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#ifdef CONFIG_SMP
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- write_pda(mmu_state, TLBSTATE_OK);
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- write_pda(active_mm, next);
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+ percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
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+ percpu_write(cpu_tlbstate.active_mm, next);
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#endif
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cpu_set(cpu, next->cpu_vm_mask);
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load_cr3(next->pgd);
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@@ -30,9 +28,9 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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}
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#ifdef CONFIG_SMP
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else {
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- write_pda(mmu_state, TLBSTATE_OK);
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- if (read_pda(active_mm) != next)
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- BUG();
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+ percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
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+ BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);
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+
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if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
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/* We were in lazy tlb mode and leave_mm disabled
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* tlb flush IPI delivery. We must reload CR3
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