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@@ -50,6 +50,7 @@
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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+#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/timex.h>
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#include <linux/vmalloc.h>
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@@ -69,7 +70,6 @@
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#include "ocelot_c_fpga.h"
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unsigned long marvell_base;
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-extern unsigned long mv64340_sram_base;
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unsigned long cpu_clock;
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/* These functions are used for rebooting or halting the machine*/
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@@ -119,7 +119,6 @@ void PMON_v2_setup(void)
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add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M);
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marvell_base = 0xfffffffff4000000;
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- mv64340_sram_base = 0xfffffffffe000000;
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#else
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/* marvell and extra space */
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add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K);
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@@ -129,7 +128,6 @@ void PMON_v2_setup(void)
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add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M);
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marvell_base = 0xf4000000;
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- mv64340_sram_base = 0xfe000000;
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#endif
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}
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@@ -365,3 +363,123 @@ static int io_base_ioremap(void)
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module_init(io_base_ioremap);
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#endif
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+
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+#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
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+
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+static struct resource mv643xx_eth_shared_resources[] = {
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+ [0] = {
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+ .name = "ethernet shared base",
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+ .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
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+ .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
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+ MV643XX_ETH_SHARED_REGS_SIZE - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device mv643xx_eth_shared_device = {
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+ .name = MV643XX_ETH_SHARED_NAME,
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+ .id = 0,
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+ .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
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+ .resource = mv643xx_eth_shared_resources,
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+};
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+
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+#define MV_SRAM_BASE 0xfe000000UL
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+#define MV_SRAM_SIZE (256 * 1024)
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+
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+#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
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+#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
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+
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+#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
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+#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
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+
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+#define MV64x60_IRQ_ETH_0 48
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+#define MV64x60_IRQ_ETH_1 49
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+
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+#ifdef CONFIG_MV643XX_ETH_0
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+
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+static struct resource mv64x60_eth0_resources[] = {
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+ [0] = {
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+ .name = "eth0 irq",
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+ .start = MV64x60_IRQ_ETH_0,
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+ .end = MV64x60_IRQ_ETH_0,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct mv643xx_eth_platform_data eth0_pd = {
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+ .tx_sram_addr = MV_SRAM_BASE_ETH0,
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+ .tx_sram_size = MV_SRAM_TXRING_SIZE,
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+ .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
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+
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+ .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
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+ .rx_sram_size = MV_SRAM_RXRING_SIZE,
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+ .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
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+};
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+
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+static struct platform_device eth0_device = {
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+ .name = MV643XX_ETH_NAME,
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+ .id = 0,
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+ .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
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+ .resource = mv64x60_eth0_resources,
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+ .dev = {
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+ .platform_data = ð0_pd,
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+ },
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+};
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+#endif /* CONFIG_MV643XX_ETH_0 */
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+
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+#ifdef CONFIG_MV643XX_ETH_1
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+
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+static struct resource mv64x60_eth1_resources[] = {
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+ [0] = {
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+ .name = "eth1 irq",
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+ .start = MV64x60_IRQ_ETH_1,
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+ .end = MV64x60_IRQ_ETH_1,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct mv643xx_eth_platform_data eth1_pd = {
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+ .tx_sram_addr = MV_SRAM_BASE_ETH1,
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+ .tx_sram_size = MV_SRAM_TXRING_SIZE,
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+ .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
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+
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+ .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
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+ .rx_sram_size = MV_SRAM_RXRING_SIZE,
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+ .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
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+};
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+
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+static struct platform_device eth1_device = {
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+ .name = MV643XX_ETH_NAME,
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+ .id = 1,
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+ .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
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+ .resource = mv64x60_eth1_resources,
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+ .dev = {
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+ .platform_data = ð1_pd,
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+ },
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+};
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+#endif /* CONFIG_MV643XX_ETH_1 */
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+
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+static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
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+ &mv643xx_eth_shared_device,
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+#ifdef CONFIG_MV643XX_ETH_0
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+ ð0_device,
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+#endif
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+#ifdef CONFIG_MV643XX_ETH_1
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+ ð1_device,
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+#endif
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+ /* The third port is not wired up on the Ocelot C */
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+};
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+
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+int mv643xx_eth_add_pds(void)
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+{
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+ int ret;
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+
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+ ret = platform_add_devices(mv643xx_eth_pd_devs,
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+ ARRAY_SIZE(mv643xx_eth_pd_devs));
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+
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+ return ret;
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+}
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+
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+device_initcall(mv643xx_eth_add_pds);
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+
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+#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
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