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@@ -53,7 +53,9 @@
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#define OCELOT_C_REG_INTSET 0xe
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#define OCELOT_C_REG_INTCLR 0xf
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-#define OCELOT_FPGA_WRITE(x, y) writeb(x, OCELOT_C_CS0_ADDR + OCELOT_C_REG_##y)
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-#define OCELOT_FPGA_READ(x) readb(OCELOT_C_CS0_ADDR + OCELOT_C_REG_##x)
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+#define __FPGA_REG_TO_ADDR(reg) \
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+ ((void *) OCELOT_C_CS0_ADDR + OCELOT_C_REG_##reg)
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+#define OCELOT_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg))
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+#define OCELOT_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg))
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#endif
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