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@@ -497,7 +497,7 @@ static void dispc_restore_context(void)
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if (dss_has_feature(FEAT_MGR_LCD3))
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RR(CONTROL3);
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/* clear spurious SYNC_LOST_DIGIT interrupts */
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- dispc_write_reg(DISPC_IRQSTATUS, DISPC_IRQ_SYNC_LOST_DIGIT);
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+ dispc_clear_irqstatus(DISPC_IRQ_SYNC_LOST_DIGIT);
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/*
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* enable last so IRQs won't trigger before
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@@ -1046,7 +1046,7 @@ static void dispc_configure_burst_sizes(void)
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const int burst_size = BURST_SIZE_X8;
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/* Configure burst size always to maximum size */
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- for (i = 0; i < omap_dss_get_num_overlays(); ++i)
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+ for (i = 0; i < dss_feat_get_num_ovls(); ++i)
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dispc_ovl_set_burst_size(i, burst_size);
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}
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@@ -1250,7 +1250,7 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
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if (use_fifomerge) {
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total_fifo_size = 0;
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- for (i = 0; i < omap_dss_get_num_overlays(); ++i)
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+ for (i = 0; i < dss_feat_get_num_ovls(); ++i)
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total_fifo_size += dispc_ovl_get_fifo_size(i);
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} else {
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total_fifo_size = ovl_fifo_size;
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@@ -2589,13 +2589,18 @@ int dispc_ovl_enable(enum omap_plane plane, bool enable)
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return 0;
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}
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+bool dispc_ovl_enabled(enum omap_plane plane)
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+{
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+ return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0);
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+}
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+
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static void dispc_mgr_disable_isr(void *data, u32 mask)
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{
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struct completion *compl = data;
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complete(compl);
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}
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-static void _enable_mgr_out(enum omap_channel channel, bool enable)
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+void dispc_mgr_enable(enum omap_channel channel, bool enable)
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{
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mgr_fld_write(channel, DISPC_MGR_FLD_ENABLE, enable);
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/* flush posted write */
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@@ -2609,7 +2614,7 @@ bool dispc_mgr_is_enabled(enum omap_channel channel)
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static void dispc_mgr_enable_lcd_out(enum omap_channel channel)
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{
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- _enable_mgr_out(channel, true);
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+ dispc_mgr_enable(channel, true);
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}
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static void dispc_mgr_disable_lcd_out(enum omap_channel channel)
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@@ -2633,7 +2638,7 @@ static void dispc_mgr_disable_lcd_out(enum omap_channel channel)
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if (r)
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DSSERR("failed to register FRAMEDONE isr\n");
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- _enable_mgr_out(channel, false);
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+ dispc_mgr_enable(channel, false);
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/* if we couldn't register for framedone, just sleep and exit */
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if (r) {
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@@ -2685,7 +2690,7 @@ static void dispc_mgr_enable_digit_out(void)
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return;
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}
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- _enable_mgr_out(OMAP_DSS_CHANNEL_DIGIT, true);
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+ dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, true);
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/* wait for the first evsync */
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if (!wait_for_completion_timeout(&vsync_compl, msecs_to_jiffies(100)))
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@@ -2735,7 +2740,7 @@ static void dispc_mgr_disable_digit_out(void)
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if (r)
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DSSERR("failed to register %x isr\n", irq_mask);
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- _enable_mgr_out(OMAP_DSS_CHANNEL_DIGIT, false);
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+ dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, false);
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/* if we couldn't register the irq, just sleep and exit */
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if (r) {
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@@ -2755,7 +2760,7 @@ static void dispc_mgr_disable_digit_out(void)
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DSSERR("failed to unregister %x isr\n", irq_mask);
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}
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-void dispc_mgr_enable(enum omap_channel channel)
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+void dispc_mgr_enable_sync(enum omap_channel channel)
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{
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if (dss_mgr_is_lcd(channel))
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dispc_mgr_enable_lcd_out(channel);
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@@ -2765,7 +2770,7 @@ void dispc_mgr_enable(enum omap_channel channel)
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WARN_ON(1);
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}
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-void dispc_mgr_disable(enum omap_channel channel)
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+void dispc_mgr_disable_sync(enum omap_channel channel)
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{
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if (dss_mgr_is_lcd(channel))
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dispc_mgr_disable_lcd_out(channel);
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@@ -3167,28 +3172,32 @@ unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
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unsigned long r;
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u32 l;
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- l = dispc_read_reg(DISPC_DIVISORo(channel));
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+ if (dss_mgr_is_lcd(channel)) {
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+ l = dispc_read_reg(DISPC_DIVISORo(channel));
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- lcd = FLD_GET(l, 23, 16);
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+ lcd = FLD_GET(l, 23, 16);
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- switch (dss_get_lcd_clk_source(channel)) {
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- case OMAP_DSS_CLK_SRC_FCK:
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- r = clk_get_rate(dispc.dss_clk);
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- break;
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- case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:
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- dsidev = dsi_get_dsidev_from_id(0);
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- r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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- break;
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- case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
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- dsidev = dsi_get_dsidev_from_id(1);
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- r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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- break;
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- default:
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- BUG();
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- return 0;
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- }
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+ switch (dss_get_lcd_clk_source(channel)) {
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+ case OMAP_DSS_CLK_SRC_FCK:
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+ r = clk_get_rate(dispc.dss_clk);
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+ break;
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+ case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:
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+ dsidev = dsi_get_dsidev_from_id(0);
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+ r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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+ break;
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+ case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
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+ dsidev = dsi_get_dsidev_from_id(1);
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+ r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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+ break;
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+ default:
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+ BUG();
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+ return 0;
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+ }
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- return r / lcd;
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+ return r / lcd;
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+ } else {
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+ return dispc_fclk_rate();
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+ }
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}
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unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)
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@@ -3247,12 +3256,9 @@ static unsigned long dispc_plane_lclk_rate(enum omap_plane plane)
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{
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enum omap_channel channel = dispc_ovl_get_channel_out(plane);
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- if (dss_mgr_is_lcd(channel))
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- return dispc_mgr_lclk_rate(channel);
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- else
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- return dispc_fclk_rate();
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-
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+ return dispc_mgr_lclk_rate(channel);
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}
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+
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static void dispc_dump_clocks_channel(struct seq_file *s, enum omap_channel channel)
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{
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int lcd, pcd;
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@@ -3621,11 +3627,35 @@ int dispc_mgr_get_clock_div(enum omap_channel channel,
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return 0;
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}
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+u32 dispc_read_irqstatus(void)
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+{
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+ return dispc_read_reg(DISPC_IRQSTATUS);
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+}
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+
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+void dispc_clear_irqstatus(u32 mask)
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+{
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+ dispc_write_reg(DISPC_IRQSTATUS, mask);
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+}
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+
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+u32 dispc_read_irqenable(void)
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+{
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+ return dispc_read_reg(DISPC_IRQENABLE);
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+}
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+
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+void dispc_write_irqenable(u32 mask)
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+{
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+ u32 old_mask = dispc_read_reg(DISPC_IRQENABLE);
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+
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+ /* clear the irqstatus for newly enabled irqs */
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+ dispc_clear_irqstatus((mask ^ old_mask) & mask);
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+
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+ dispc_write_reg(DISPC_IRQENABLE, mask);
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+}
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+
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/* dispc.irq_lock has to be locked by the caller */
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static void _omap_dispc_set_irqs(void)
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{
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u32 mask;
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- u32 old_mask;
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int i;
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struct omap_dispc_isr_data *isr_data;
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@@ -3640,11 +3670,7 @@ static void _omap_dispc_set_irqs(void)
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mask |= isr_data->mask;
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}
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- old_mask = dispc_read_reg(DISPC_IRQENABLE);
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- /* clear the irqstatus for newly enabled irqs */
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- dispc_write_reg(DISPC_IRQSTATUS, (mask ^ old_mask) & mask);
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-
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- dispc_write_reg(DISPC_IRQENABLE, mask);
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+ dispc_write_irqenable(mask);
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}
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int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
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@@ -3771,8 +3797,8 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *arg)
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spin_lock(&dispc.irq_lock);
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- irqstatus = dispc_read_reg(DISPC_IRQSTATUS);
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- irqenable = dispc_read_reg(DISPC_IRQENABLE);
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+ irqstatus = dispc_read_irqstatus();
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+ irqenable = dispc_read_irqenable();
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/* IRQ is not for us */
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if (!(irqstatus & irqenable)) {
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@@ -3791,9 +3817,9 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *arg)
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/* Ack the interrupt. Do it here before clocks are possibly turned
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* off */
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- dispc_write_reg(DISPC_IRQSTATUS, irqstatus);
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+ dispc_clear_irqstatus(irqstatus);
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/* flush posted write */
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- dispc_read_reg(DISPC_IRQSTATUS);
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+ dispc_read_irqstatus();
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/* make a copy and unlock, so that isrs can unregister
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* themselves */
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@@ -3875,30 +3901,24 @@ static void dispc_error_worker(struct work_struct *work)
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bit = mgr_desc[i].sync_lost_irq;
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if (bit & errors) {
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- struct omap_dss_device *dssdev = mgr->get_device(mgr);
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- bool enable;
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+ int j;
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DSSERR("SYNC_LOST on channel %s, restarting the output "
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"with video overlays disabled\n",
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mgr->name);
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- enable = dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
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- dssdev->driver->disable(dssdev);
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+ dss_mgr_disable(mgr);
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- for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
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+ for (j = 0; j < omap_dss_get_num_overlays(); ++j) {
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struct omap_overlay *ovl;
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- ovl = omap_dss_get_overlay(i);
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+ ovl = omap_dss_get_overlay(j);
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if (ovl->id != OMAP_DSS_GFX &&
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ovl->manager == mgr)
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- dispc_ovl_enable(ovl->id, false);
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+ ovl->disable(ovl);
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}
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- dispc_mgr_go(mgr->id);
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- msleep(50);
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-
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- if (enable)
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- dssdev->driver->enable(dssdev);
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+ dss_mgr_enable(mgr);
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}
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}
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@@ -3906,13 +3926,9 @@ static void dispc_error_worker(struct work_struct *work)
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DSSERR("OCP_ERR\n");
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for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) {
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struct omap_overlay_manager *mgr;
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- struct omap_dss_device *dssdev;
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mgr = omap_dss_get_overlay_manager(i);
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- dssdev = mgr->get_device(mgr);
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-
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- if (dssdev && dssdev->driver)
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- dssdev->driver->disable(dssdev);
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+ dss_mgr_disable(mgr);
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}
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}
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@@ -4002,7 +4018,7 @@ static void _omap_dispc_initialize_irq(void)
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/* there's SYNC_LOST_DIGIT waiting after enabling the DSS,
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* so clear it */
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- dispc_write_reg(DISPC_IRQSTATUS, dispc_read_reg(DISPC_IRQSTATUS));
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+ dispc_clear_irqstatus(dispc_read_irqstatus());
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_omap_dispc_set_irqs();
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@@ -4098,7 +4114,6 @@ static const struct dispc_features omap44xx_dispc_feats __initconst = {
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static int __init dispc_init_features(struct platform_device *pdev)
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{
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- struct omap_dss_board_info *pdata = pdev->dev.platform_data;
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const struct dispc_features *src;
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struct dispc_features *dst;
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@@ -4108,7 +4123,7 @@ static int __init dispc_init_features(struct platform_device *pdev)
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return -ENOMEM;
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}
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- switch (pdata->version) {
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+ switch (omapdss_get_version()) {
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case OMAPDSS_VER_OMAP24xx:
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src = &omap24xx_dispc_feats;
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break;
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