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@@ -1391,6 +1391,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
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int transconf_reg = (pipe == 0) ? TRANSACONF : TRANSBCONF;
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int pf_ctl_reg = (pipe == 0) ? PFA_CTL_1 : PFB_CTL_1;
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int pf_win_size = (pipe == 0) ? PFA_WIN_SZ : PFB_WIN_SZ;
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+ int pf_win_pos = (pipe == 0) ? PFA_WIN_POS : PFB_WIN_POS;
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int cpu_htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;
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int cpu_hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;
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int cpu_hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B;
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@@ -1442,6 +1443,19 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
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}
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}
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+ /* Enable panel fitting for LVDS */
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+ if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
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+ temp = I915_READ(pf_ctl_reg);
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+ I915_WRITE(pf_ctl_reg, temp | PF_ENABLE);
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+
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+ /* currently full aspect */
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+ I915_WRITE(pf_win_pos, 0);
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+
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+ I915_WRITE(pf_win_size,
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+ (dev_priv->panel_fixed_mode->hdisplay << 16) |
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+ (dev_priv->panel_fixed_mode->vdisplay));
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+ }
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+
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/* Enable CPU pipe */
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temp = I915_READ(pipeconf_reg);
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if ((temp & PIPEACONF_ENABLE) == 0) {
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