intel_lvds.c 30 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_priv {
  42. int fitting_mode;
  43. u32 pfit_control;
  44. u32 pfit_pgm_ratios;
  45. };
  46. /**
  47. * Sets the backlight level.
  48. *
  49. * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  50. */
  51. static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  52. {
  53. struct drm_i915_private *dev_priv = dev->dev_private;
  54. u32 blc_pwm_ctl, reg;
  55. if (IS_IGDNG(dev))
  56. reg = BLC_PWM_CPU_CTL;
  57. else
  58. reg = BLC_PWM_CTL;
  59. blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  60. I915_WRITE(reg, (blc_pwm_ctl |
  61. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  62. }
  63. /**
  64. * Returns the maximum level of the backlight duty cycle field.
  65. */
  66. static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  67. {
  68. struct drm_i915_private *dev_priv = dev->dev_private;
  69. u32 reg;
  70. if (IS_IGDNG(dev))
  71. reg = BLC_PWM_PCH_CTL2;
  72. else
  73. reg = BLC_PWM_CTL;
  74. return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  75. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  76. }
  77. /**
  78. * Sets the power state for the panel.
  79. */
  80. static void intel_lvds_set_power(struct drm_device *dev, bool on)
  81. {
  82. struct drm_i915_private *dev_priv = dev->dev_private;
  83. u32 pp_status, ctl_reg, status_reg;
  84. if (IS_IGDNG(dev)) {
  85. ctl_reg = PCH_PP_CONTROL;
  86. status_reg = PCH_PP_STATUS;
  87. } else {
  88. ctl_reg = PP_CONTROL;
  89. status_reg = PP_STATUS;
  90. }
  91. if (on) {
  92. I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
  93. POWER_TARGET_ON);
  94. do {
  95. pp_status = I915_READ(status_reg);
  96. } while ((pp_status & PP_ON) == 0);
  97. intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
  98. } else {
  99. intel_lvds_set_backlight(dev, 0);
  100. I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
  101. ~POWER_TARGET_ON);
  102. do {
  103. pp_status = I915_READ(status_reg);
  104. } while (pp_status & PP_ON);
  105. }
  106. }
  107. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  108. {
  109. struct drm_device *dev = encoder->dev;
  110. if (mode == DRM_MODE_DPMS_ON)
  111. intel_lvds_set_power(dev, true);
  112. else
  113. intel_lvds_set_power(dev, false);
  114. /* XXX: We never power down the LVDS pairs. */
  115. }
  116. static void intel_lvds_save(struct drm_connector *connector)
  117. {
  118. struct drm_device *dev = connector->dev;
  119. struct drm_i915_private *dev_priv = dev->dev_private;
  120. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  121. u32 pwm_ctl_reg;
  122. if (IS_IGDNG(dev)) {
  123. pp_on_reg = PCH_PP_ON_DELAYS;
  124. pp_off_reg = PCH_PP_OFF_DELAYS;
  125. pp_ctl_reg = PCH_PP_CONTROL;
  126. pp_div_reg = PCH_PP_DIVISOR;
  127. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  128. } else {
  129. pp_on_reg = PP_ON_DELAYS;
  130. pp_off_reg = PP_OFF_DELAYS;
  131. pp_ctl_reg = PP_CONTROL;
  132. pp_div_reg = PP_DIVISOR;
  133. pwm_ctl_reg = BLC_PWM_CTL;
  134. }
  135. dev_priv->savePP_ON = I915_READ(pp_on_reg);
  136. dev_priv->savePP_OFF = I915_READ(pp_off_reg);
  137. dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
  138. dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
  139. dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
  140. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  141. BACKLIGHT_DUTY_CYCLE_MASK);
  142. /*
  143. * If the light is off at server startup, just make it full brightness
  144. */
  145. if (dev_priv->backlight_duty_cycle == 0)
  146. dev_priv->backlight_duty_cycle =
  147. intel_lvds_get_max_backlight(dev);
  148. }
  149. static void intel_lvds_restore(struct drm_connector *connector)
  150. {
  151. struct drm_device *dev = connector->dev;
  152. struct drm_i915_private *dev_priv = dev->dev_private;
  153. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  154. u32 pwm_ctl_reg;
  155. if (IS_IGDNG(dev)) {
  156. pp_on_reg = PCH_PP_ON_DELAYS;
  157. pp_off_reg = PCH_PP_OFF_DELAYS;
  158. pp_ctl_reg = PCH_PP_CONTROL;
  159. pp_div_reg = PCH_PP_DIVISOR;
  160. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  161. } else {
  162. pp_on_reg = PP_ON_DELAYS;
  163. pp_off_reg = PP_OFF_DELAYS;
  164. pp_ctl_reg = PP_CONTROL;
  165. pp_div_reg = PP_DIVISOR;
  166. pwm_ctl_reg = BLC_PWM_CTL;
  167. }
  168. I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
  169. I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
  170. I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
  171. I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
  172. I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
  173. if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
  174. intel_lvds_set_power(dev, true);
  175. else
  176. intel_lvds_set_power(dev, false);
  177. }
  178. static int intel_lvds_mode_valid(struct drm_connector *connector,
  179. struct drm_display_mode *mode)
  180. {
  181. struct drm_device *dev = connector->dev;
  182. struct drm_i915_private *dev_priv = dev->dev_private;
  183. struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
  184. if (fixed_mode) {
  185. if (mode->hdisplay > fixed_mode->hdisplay)
  186. return MODE_PANEL;
  187. if (mode->vdisplay > fixed_mode->vdisplay)
  188. return MODE_PANEL;
  189. }
  190. return MODE_OK;
  191. }
  192. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  193. struct drm_display_mode *mode,
  194. struct drm_display_mode *adjusted_mode)
  195. {
  196. /*
  197. * float point operation is not supported . So the PANEL_RATIO_FACTOR
  198. * is defined, which can avoid the float point computation when
  199. * calculating the panel ratio.
  200. */
  201. #define PANEL_RATIO_FACTOR 8192
  202. struct drm_device *dev = encoder->dev;
  203. struct drm_i915_private *dev_priv = dev->dev_private;
  204. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  205. struct drm_encoder *tmp_encoder;
  206. struct intel_output *intel_output = enc_to_intel_output(encoder);
  207. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  208. u32 pfit_control = 0, pfit_pgm_ratios = 0;
  209. int left_border = 0, right_border = 0, top_border = 0;
  210. int bottom_border = 0;
  211. bool border = 0;
  212. int panel_ratio, desired_ratio, vert_scale, horiz_scale;
  213. int horiz_ratio, vert_ratio;
  214. u32 hsync_width, vsync_width;
  215. u32 hblank_width, vblank_width;
  216. u32 hsync_pos, vsync_pos;
  217. /* Should never happen!! */
  218. if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
  219. DRM_ERROR("Can't support LVDS on pipe A\n");
  220. return false;
  221. }
  222. /* Should never happen!! */
  223. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  224. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  225. DRM_ERROR("Can't enable LVDS and another "
  226. "encoder on the same pipe\n");
  227. return false;
  228. }
  229. }
  230. /* If we don't have a panel mode, there is nothing we can do */
  231. if (dev_priv->panel_fixed_mode == NULL)
  232. return true;
  233. /*
  234. * If we have timings from the BIOS for the panel, put them in
  235. * to the adjusted mode. The CRTC will be set up for this mode,
  236. * with the panel scaling set up to source from the H/VDisplay
  237. * of the original mode.
  238. */
  239. if (dev_priv->panel_fixed_mode != NULL) {
  240. adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
  241. adjusted_mode->hsync_start =
  242. dev_priv->panel_fixed_mode->hsync_start;
  243. adjusted_mode->hsync_end =
  244. dev_priv->panel_fixed_mode->hsync_end;
  245. adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
  246. adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
  247. adjusted_mode->vsync_start =
  248. dev_priv->panel_fixed_mode->vsync_start;
  249. adjusted_mode->vsync_end =
  250. dev_priv->panel_fixed_mode->vsync_end;
  251. adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
  252. adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
  253. drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
  254. }
  255. /* Make sure pre-965s set dither correctly */
  256. if (!IS_I965G(dev)) {
  257. if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
  258. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  259. }
  260. /* Native modes don't need fitting */
  261. if (adjusted_mode->hdisplay == mode->hdisplay &&
  262. adjusted_mode->vdisplay == mode->vdisplay) {
  263. pfit_pgm_ratios = 0;
  264. border = 0;
  265. goto out;
  266. }
  267. /* full screen scale for now */
  268. if (IS_IGDNG(dev))
  269. goto out;
  270. /* 965+ wants fuzzy fitting */
  271. if (IS_I965G(dev))
  272. pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  273. PFIT_FILTER_FUZZY;
  274. hsync_width = adjusted_mode->crtc_hsync_end -
  275. adjusted_mode->crtc_hsync_start;
  276. vsync_width = adjusted_mode->crtc_vsync_end -
  277. adjusted_mode->crtc_vsync_start;
  278. hblank_width = adjusted_mode->crtc_hblank_end -
  279. adjusted_mode->crtc_hblank_start;
  280. vblank_width = adjusted_mode->crtc_vblank_end -
  281. adjusted_mode->crtc_vblank_start;
  282. /*
  283. * Deal with panel fitting options. Figure out how to stretch the
  284. * image based on its aspect ratio & the current panel fitting mode.
  285. */
  286. panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
  287. adjusted_mode->vdisplay;
  288. desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
  289. mode->vdisplay;
  290. /*
  291. * Enable automatic panel scaling for non-native modes so that they fill
  292. * the screen. Should be enabled before the pipe is enabled, according
  293. * to register description and PRM.
  294. * Change the value here to see the borders for debugging
  295. */
  296. if (!IS_IGDNG(dev)) {
  297. I915_WRITE(BCLRPAT_A, 0);
  298. I915_WRITE(BCLRPAT_B, 0);
  299. }
  300. switch (lvds_priv->fitting_mode) {
  301. case DRM_MODE_SCALE_CENTER:
  302. /*
  303. * For centered modes, we have to calculate border widths &
  304. * heights and modify the values programmed into the CRTC.
  305. */
  306. left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
  307. right_border = left_border;
  308. if (mode->hdisplay & 1)
  309. right_border++;
  310. top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
  311. bottom_border = top_border;
  312. if (mode->vdisplay & 1)
  313. bottom_border++;
  314. /* Set active & border values */
  315. adjusted_mode->crtc_hdisplay = mode->hdisplay;
  316. /* Keep the boder be even */
  317. if (right_border & 1)
  318. right_border++;
  319. /* use the border directly instead of border minuse one */
  320. adjusted_mode->crtc_hblank_start = mode->hdisplay +
  321. right_border;
  322. /* keep the blank width constant */
  323. adjusted_mode->crtc_hblank_end =
  324. adjusted_mode->crtc_hblank_start + hblank_width;
  325. /* get the hsync pos relative to hblank start */
  326. hsync_pos = (hblank_width - hsync_width) / 2;
  327. /* keep the hsync pos be even */
  328. if (hsync_pos & 1)
  329. hsync_pos++;
  330. adjusted_mode->crtc_hsync_start =
  331. adjusted_mode->crtc_hblank_start + hsync_pos;
  332. /* keep the hsync width constant */
  333. adjusted_mode->crtc_hsync_end =
  334. adjusted_mode->crtc_hsync_start + hsync_width;
  335. adjusted_mode->crtc_vdisplay = mode->vdisplay;
  336. /* use the border instead of border minus one */
  337. adjusted_mode->crtc_vblank_start = mode->vdisplay +
  338. bottom_border;
  339. /* keep the vblank width constant */
  340. adjusted_mode->crtc_vblank_end =
  341. adjusted_mode->crtc_vblank_start + vblank_width;
  342. /* get the vsync start postion relative to vblank start */
  343. vsync_pos = (vblank_width - vsync_width) / 2;
  344. adjusted_mode->crtc_vsync_start =
  345. adjusted_mode->crtc_vblank_start + vsync_pos;
  346. /* keep the vsync width constant */
  347. adjusted_mode->crtc_vsync_end =
  348. adjusted_mode->crtc_vblank_start + vsync_width;
  349. border = 1;
  350. break;
  351. case DRM_MODE_SCALE_ASPECT:
  352. /* Scale but preserve the spect ratio */
  353. pfit_control |= PFIT_ENABLE;
  354. if (IS_I965G(dev)) {
  355. /* 965+ is easy, it does everything in hw */
  356. if (panel_ratio > desired_ratio)
  357. pfit_control |= PFIT_SCALING_PILLAR;
  358. else if (panel_ratio < desired_ratio)
  359. pfit_control |= PFIT_SCALING_LETTER;
  360. else
  361. pfit_control |= PFIT_SCALING_AUTO;
  362. } else {
  363. /*
  364. * For earlier chips we have to calculate the scaling
  365. * ratio by hand and program it into the
  366. * PFIT_PGM_RATIO register
  367. */
  368. u32 horiz_bits, vert_bits, bits = 12;
  369. horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
  370. adjusted_mode->hdisplay;
  371. vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
  372. adjusted_mode->vdisplay;
  373. horiz_scale = adjusted_mode->hdisplay *
  374. PANEL_RATIO_FACTOR / mode->hdisplay;
  375. vert_scale = adjusted_mode->vdisplay *
  376. PANEL_RATIO_FACTOR / mode->vdisplay;
  377. /* retain aspect ratio */
  378. if (panel_ratio > desired_ratio) { /* Pillar */
  379. u32 scaled_width;
  380. scaled_width = mode->hdisplay * vert_scale /
  381. PANEL_RATIO_FACTOR;
  382. horiz_ratio = vert_ratio;
  383. pfit_control |= (VERT_AUTO_SCALE |
  384. VERT_INTERP_BILINEAR |
  385. HORIZ_INTERP_BILINEAR);
  386. /* Pillar will have left/right borders */
  387. left_border = (adjusted_mode->hdisplay -
  388. scaled_width) / 2;
  389. right_border = left_border;
  390. if (mode->hdisplay & 1) /* odd resolutions */
  391. right_border++;
  392. /* keep the border be even */
  393. if (right_border & 1)
  394. right_border++;
  395. adjusted_mode->crtc_hdisplay = scaled_width;
  396. /* use border instead of border minus one */
  397. adjusted_mode->crtc_hblank_start =
  398. scaled_width + right_border;
  399. /* keep the hblank width constant */
  400. adjusted_mode->crtc_hblank_end =
  401. adjusted_mode->crtc_hblank_start +
  402. hblank_width;
  403. /*
  404. * get the hsync start pos relative to
  405. * hblank start
  406. */
  407. hsync_pos = (hblank_width - hsync_width) / 2;
  408. /* keep the hsync_pos be even */
  409. if (hsync_pos & 1)
  410. hsync_pos++;
  411. adjusted_mode->crtc_hsync_start =
  412. adjusted_mode->crtc_hblank_start +
  413. hsync_pos;
  414. /* keept hsync width constant */
  415. adjusted_mode->crtc_hsync_end =
  416. adjusted_mode->crtc_hsync_start +
  417. hsync_width;
  418. border = 1;
  419. } else if (panel_ratio < desired_ratio) { /* letter */
  420. u32 scaled_height = mode->vdisplay *
  421. horiz_scale / PANEL_RATIO_FACTOR;
  422. vert_ratio = horiz_ratio;
  423. pfit_control |= (HORIZ_AUTO_SCALE |
  424. VERT_INTERP_BILINEAR |
  425. HORIZ_INTERP_BILINEAR);
  426. /* Letterbox will have top/bottom border */
  427. top_border = (adjusted_mode->vdisplay -
  428. scaled_height) / 2;
  429. bottom_border = top_border;
  430. if (mode->vdisplay & 1)
  431. bottom_border++;
  432. adjusted_mode->crtc_vdisplay = scaled_height;
  433. /* use border instead of border minus one */
  434. adjusted_mode->crtc_vblank_start =
  435. scaled_height + bottom_border;
  436. /* keep the vblank width constant */
  437. adjusted_mode->crtc_vblank_end =
  438. adjusted_mode->crtc_vblank_start +
  439. vblank_width;
  440. /*
  441. * get the vsync start pos relative to
  442. * vblank start
  443. */
  444. vsync_pos = (vblank_width - vsync_width) / 2;
  445. adjusted_mode->crtc_vsync_start =
  446. adjusted_mode->crtc_vblank_start +
  447. vsync_pos;
  448. /* keep the vsync width constant */
  449. adjusted_mode->crtc_vsync_end =
  450. adjusted_mode->crtc_vsync_start +
  451. vsync_width;
  452. border = 1;
  453. } else {
  454. /* Aspects match, Let hw scale both directions */
  455. pfit_control |= (VERT_AUTO_SCALE |
  456. HORIZ_AUTO_SCALE |
  457. VERT_INTERP_BILINEAR |
  458. HORIZ_INTERP_BILINEAR);
  459. }
  460. horiz_bits = (1 << bits) * horiz_ratio /
  461. PANEL_RATIO_FACTOR;
  462. vert_bits = (1 << bits) * vert_ratio /
  463. PANEL_RATIO_FACTOR;
  464. pfit_pgm_ratios =
  465. ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
  466. PFIT_VERT_SCALE_MASK) |
  467. ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
  468. PFIT_HORIZ_SCALE_MASK);
  469. }
  470. break;
  471. case DRM_MODE_SCALE_FULLSCREEN:
  472. /*
  473. * Full scaling, even if it changes the aspect ratio.
  474. * Fortunately this is all done for us in hw.
  475. */
  476. pfit_control |= PFIT_ENABLE;
  477. if (IS_I965G(dev))
  478. pfit_control |= PFIT_SCALING_AUTO;
  479. else
  480. pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  481. VERT_INTERP_BILINEAR |
  482. HORIZ_INTERP_BILINEAR);
  483. break;
  484. default:
  485. break;
  486. }
  487. out:
  488. lvds_priv->pfit_control = pfit_control;
  489. lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
  490. /*
  491. * XXX: It would be nice to support lower refresh rates on the
  492. * panels to reduce power consumption, and perhaps match the
  493. * user's requested refresh rate.
  494. */
  495. return true;
  496. }
  497. static void intel_lvds_prepare(struct drm_encoder *encoder)
  498. {
  499. struct drm_device *dev = encoder->dev;
  500. struct drm_i915_private *dev_priv = dev->dev_private;
  501. u32 reg;
  502. if (IS_IGDNG(dev))
  503. reg = BLC_PWM_CPU_CTL;
  504. else
  505. reg = BLC_PWM_CTL;
  506. dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
  507. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  508. BACKLIGHT_DUTY_CYCLE_MASK);
  509. intel_lvds_set_power(dev, false);
  510. }
  511. static void intel_lvds_commit( struct drm_encoder *encoder)
  512. {
  513. struct drm_device *dev = encoder->dev;
  514. struct drm_i915_private *dev_priv = dev->dev_private;
  515. if (dev_priv->backlight_duty_cycle == 0)
  516. dev_priv->backlight_duty_cycle =
  517. intel_lvds_get_max_backlight(dev);
  518. intel_lvds_set_power(dev, true);
  519. }
  520. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  521. struct drm_display_mode *mode,
  522. struct drm_display_mode *adjusted_mode)
  523. {
  524. struct drm_device *dev = encoder->dev;
  525. struct drm_i915_private *dev_priv = dev->dev_private;
  526. struct intel_output *intel_output = enc_to_intel_output(encoder);
  527. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  528. /*
  529. * The LVDS pin pair will already have been turned on in the
  530. * intel_crtc_mode_set since it has a large impact on the DPLL
  531. * settings.
  532. */
  533. if (IS_IGDNG(dev))
  534. return;
  535. /*
  536. * Enable automatic panel scaling so that non-native modes fill the
  537. * screen. Should be enabled before the pipe is enabled, according to
  538. * register description and PRM.
  539. */
  540. I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
  541. I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
  542. }
  543. /**
  544. * Detect the LVDS connection.
  545. *
  546. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  547. * connected and closed means disconnected. We also send hotplug events as
  548. * needed, using lid status notification from the input layer.
  549. */
  550. static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
  551. {
  552. enum drm_connector_status status = connector_status_connected;
  553. if (!acpi_lid_open())
  554. status = connector_status_disconnected;
  555. return status;
  556. }
  557. /**
  558. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  559. */
  560. static int intel_lvds_get_modes(struct drm_connector *connector)
  561. {
  562. struct drm_device *dev = connector->dev;
  563. struct intel_output *intel_output = to_intel_output(connector);
  564. struct drm_i915_private *dev_priv = dev->dev_private;
  565. int ret = 0;
  566. ret = intel_ddc_get_modes(intel_output);
  567. if (ret)
  568. return ret;
  569. /* Didn't get an EDID, so
  570. * Set wide sync ranges so we get all modes
  571. * handed to valid_mode for checking
  572. */
  573. connector->display_info.min_vfreq = 0;
  574. connector->display_info.max_vfreq = 200;
  575. connector->display_info.min_hfreq = 0;
  576. connector->display_info.max_hfreq = 200;
  577. if (dev_priv->panel_fixed_mode != NULL) {
  578. struct drm_display_mode *mode;
  579. mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
  580. drm_mode_probed_add(connector, mode);
  581. return 1;
  582. }
  583. return 0;
  584. }
  585. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  586. void *unused)
  587. {
  588. struct drm_i915_private *dev_priv =
  589. container_of(nb, struct drm_i915_private, lid_notifier);
  590. struct drm_device *dev = dev_priv->dev;
  591. if (acpi_lid_open())
  592. drm_helper_resume_force_mode(dev);
  593. drm_sysfs_hotplug_event(dev_priv->dev);
  594. return NOTIFY_OK;
  595. }
  596. /**
  597. * intel_lvds_destroy - unregister and free LVDS structures
  598. * @connector: connector to free
  599. *
  600. * Unregister the DDC bus for this connector then free the driver private
  601. * structure.
  602. */
  603. static void intel_lvds_destroy(struct drm_connector *connector)
  604. {
  605. struct drm_device *dev = connector->dev;
  606. struct intel_output *intel_output = to_intel_output(connector);
  607. struct drm_i915_private *dev_priv = dev->dev_private;
  608. if (intel_output->ddc_bus)
  609. intel_i2c_destroy(intel_output->ddc_bus);
  610. if (dev_priv->lid_notifier.notifier_call)
  611. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  612. drm_sysfs_connector_remove(connector);
  613. drm_connector_cleanup(connector);
  614. kfree(connector);
  615. }
  616. static int intel_lvds_set_property(struct drm_connector *connector,
  617. struct drm_property *property,
  618. uint64_t value)
  619. {
  620. struct drm_device *dev = connector->dev;
  621. struct intel_output *intel_output =
  622. to_intel_output(connector);
  623. if (property == dev->mode_config.scaling_mode_property &&
  624. connector->encoder) {
  625. struct drm_crtc *crtc = connector->encoder->crtc;
  626. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  627. if (value == DRM_MODE_SCALE_NONE) {
  628. DRM_DEBUG_KMS("no scaling not supported\n");
  629. return 0;
  630. }
  631. if (lvds_priv->fitting_mode == value) {
  632. /* the LVDS scaling property is not changed */
  633. return 0;
  634. }
  635. lvds_priv->fitting_mode = value;
  636. if (crtc && crtc->enabled) {
  637. /*
  638. * If the CRTC is enabled, the display will be changed
  639. * according to the new panel fitting mode.
  640. */
  641. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  642. crtc->x, crtc->y, crtc->fb);
  643. }
  644. }
  645. return 0;
  646. }
  647. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  648. .dpms = intel_lvds_dpms,
  649. .mode_fixup = intel_lvds_mode_fixup,
  650. .prepare = intel_lvds_prepare,
  651. .mode_set = intel_lvds_mode_set,
  652. .commit = intel_lvds_commit,
  653. };
  654. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  655. .get_modes = intel_lvds_get_modes,
  656. .mode_valid = intel_lvds_mode_valid,
  657. .best_encoder = intel_best_encoder,
  658. };
  659. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  660. .dpms = drm_helper_connector_dpms,
  661. .save = intel_lvds_save,
  662. .restore = intel_lvds_restore,
  663. .detect = intel_lvds_detect,
  664. .fill_modes = drm_helper_probe_single_connector_modes,
  665. .set_property = intel_lvds_set_property,
  666. .destroy = intel_lvds_destroy,
  667. };
  668. static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
  669. {
  670. drm_encoder_cleanup(encoder);
  671. }
  672. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  673. .destroy = intel_lvds_enc_destroy,
  674. };
  675. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  676. {
  677. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  678. return 1;
  679. }
  680. /* These systems claim to have LVDS, but really don't */
  681. static const struct dmi_system_id intel_no_lvds[] = {
  682. {
  683. .callback = intel_no_lvds_dmi_callback,
  684. .ident = "Apple Mac Mini (Core series)",
  685. .matches = {
  686. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  687. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  688. },
  689. },
  690. {
  691. .callback = intel_no_lvds_dmi_callback,
  692. .ident = "Apple Mac Mini (Core 2 series)",
  693. .matches = {
  694. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  695. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  696. },
  697. },
  698. {
  699. .callback = intel_no_lvds_dmi_callback,
  700. .ident = "MSI IM-945GSE-A",
  701. .matches = {
  702. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  703. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  704. },
  705. },
  706. {
  707. .callback = intel_no_lvds_dmi_callback,
  708. .ident = "Dell Studio Hybrid",
  709. .matches = {
  710. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  711. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  712. },
  713. },
  714. {
  715. .callback = intel_no_lvds_dmi_callback,
  716. .ident = "AOpen Mini PC",
  717. .matches = {
  718. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  719. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  720. },
  721. },
  722. {
  723. .callback = intel_no_lvds_dmi_callback,
  724. .ident = "AOpen Mini PC MP915",
  725. .matches = {
  726. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  727. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  728. },
  729. },
  730. {
  731. .callback = intel_no_lvds_dmi_callback,
  732. .ident = "Aopen i945GTt-VFA",
  733. .matches = {
  734. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  735. },
  736. },
  737. { } /* terminating entry */
  738. };
  739. #ifdef CONFIG_ACPI
  740. /*
  741. * check_lid_device -- check whether @handle is an ACPI LID device.
  742. * @handle: ACPI device handle
  743. * @level : depth in the ACPI namespace tree
  744. * @context: the number of LID device when we find the device
  745. * @rv: a return value to fill if desired (Not use)
  746. */
  747. static acpi_status
  748. check_lid_device(acpi_handle handle, u32 level, void *context,
  749. void **return_value)
  750. {
  751. struct acpi_device *acpi_dev;
  752. int *lid_present = context;
  753. acpi_dev = NULL;
  754. /* Get the acpi device for device handle */
  755. if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
  756. /* If there is no ACPI device for handle, return */
  757. return AE_OK;
  758. }
  759. if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
  760. *lid_present = 1;
  761. return AE_OK;
  762. }
  763. /**
  764. * check whether there exists the ACPI LID device by enumerating the ACPI
  765. * device tree.
  766. */
  767. static int intel_lid_present(void)
  768. {
  769. int lid_present = 0;
  770. if (acpi_disabled) {
  771. /* If ACPI is disabled, there is no ACPI device tree to
  772. * check, so assume the LID device would have been present.
  773. */
  774. return 1;
  775. }
  776. acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
  777. ACPI_UINT32_MAX,
  778. check_lid_device, &lid_present, NULL);
  779. return lid_present;
  780. }
  781. #else
  782. static int intel_lid_present(void)
  783. {
  784. /* In the absence of ACPI built in, assume that the LID device would
  785. * have been present.
  786. */
  787. return 1;
  788. }
  789. #endif
  790. /**
  791. * intel_lvds_init - setup LVDS connectors on this device
  792. * @dev: drm device
  793. *
  794. * Create the connector, register the LVDS DDC bus, and try to figure out what
  795. * modes we can display on the LVDS panel (if present).
  796. */
  797. void intel_lvds_init(struct drm_device *dev)
  798. {
  799. struct drm_i915_private *dev_priv = dev->dev_private;
  800. struct intel_output *intel_output;
  801. struct drm_connector *connector;
  802. struct drm_encoder *encoder;
  803. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  804. struct drm_crtc *crtc;
  805. struct intel_lvds_priv *lvds_priv;
  806. u32 lvds;
  807. int pipe, gpio = GPIOC;
  808. /* Skip init on machines we know falsely report LVDS */
  809. if (dmi_check_system(intel_no_lvds))
  810. return;
  811. /* Assume that any device without an ACPI LID device also doesn't
  812. * have an integrated LVDS. We would be better off parsing the BIOS
  813. * to get a reliable indicator, but that code isn't written yet.
  814. *
  815. * In the case of all-in-one desktops using LVDS that we've seen,
  816. * they're using SDVO LVDS.
  817. */
  818. if (!intel_lid_present())
  819. return;
  820. if (IS_IGDNG(dev)) {
  821. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  822. return;
  823. if (dev_priv->edp_support) {
  824. DRM_DEBUG("disable LVDS for eDP support\n");
  825. return;
  826. }
  827. gpio = PCH_GPIOC;
  828. }
  829. intel_output = kzalloc(sizeof(struct intel_output) +
  830. sizeof(struct intel_lvds_priv), GFP_KERNEL);
  831. if (!intel_output) {
  832. return;
  833. }
  834. connector = &intel_output->base;
  835. encoder = &intel_output->enc;
  836. drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
  837. DRM_MODE_CONNECTOR_LVDS);
  838. drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
  839. DRM_MODE_ENCODER_LVDS);
  840. drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
  841. intel_output->type = INTEL_OUTPUT_LVDS;
  842. intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  843. intel_output->crtc_mask = (1 << 1);
  844. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  845. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  846. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  847. connector->interlace_allowed = false;
  848. connector->doublescan_allowed = false;
  849. lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
  850. intel_output->dev_priv = lvds_priv;
  851. /* create the scaling mode property */
  852. drm_mode_create_scaling_mode_property(dev);
  853. /*
  854. * the initial panel fitting mode will be FULL_SCREEN.
  855. */
  856. drm_connector_attach_property(&intel_output->base,
  857. dev->mode_config.scaling_mode_property,
  858. DRM_MODE_SCALE_FULLSCREEN);
  859. lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
  860. /*
  861. * LVDS discovery:
  862. * 1) check for EDID on DDC
  863. * 2) check for VBT data
  864. * 3) check to see if LVDS is already on
  865. * if none of the above, no panel
  866. * 4) make sure lid is open
  867. * if closed, act like it's not there for now
  868. */
  869. /* Set up the DDC bus. */
  870. intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
  871. if (!intel_output->ddc_bus) {
  872. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  873. "failed.\n");
  874. goto failed;
  875. }
  876. /*
  877. * Attempt to get the fixed panel mode from DDC. Assume that the
  878. * preferred mode is the right one.
  879. */
  880. intel_ddc_get_modes(intel_output);
  881. list_for_each_entry(scan, &connector->probed_modes, head) {
  882. mutex_lock(&dev->mode_config.mutex);
  883. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  884. dev_priv->panel_fixed_mode =
  885. drm_mode_duplicate(dev, scan);
  886. mutex_unlock(&dev->mode_config.mutex);
  887. goto out;
  888. }
  889. mutex_unlock(&dev->mode_config.mutex);
  890. }
  891. /* Failed to get EDID, what about VBT? */
  892. if (dev_priv->lfp_lvds_vbt_mode) {
  893. mutex_lock(&dev->mode_config.mutex);
  894. dev_priv->panel_fixed_mode =
  895. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  896. mutex_unlock(&dev->mode_config.mutex);
  897. if (dev_priv->panel_fixed_mode) {
  898. dev_priv->panel_fixed_mode->type |=
  899. DRM_MODE_TYPE_PREFERRED;
  900. goto out;
  901. }
  902. }
  903. /*
  904. * If we didn't get EDID, try checking if the panel is already turned
  905. * on. If so, assume that whatever is currently programmed is the
  906. * correct mode.
  907. */
  908. /* IGDNG: FIXME if still fail, not try pipe mode now */
  909. if (IS_IGDNG(dev))
  910. goto failed;
  911. lvds = I915_READ(LVDS);
  912. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  913. crtc = intel_get_crtc_from_pipe(dev, pipe);
  914. if (crtc && (lvds & LVDS_PORT_EN)) {
  915. dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
  916. if (dev_priv->panel_fixed_mode) {
  917. dev_priv->panel_fixed_mode->type |=
  918. DRM_MODE_TYPE_PREFERRED;
  919. goto out;
  920. }
  921. }
  922. /* If we still don't have a mode after all that, give up. */
  923. if (!dev_priv->panel_fixed_mode)
  924. goto failed;
  925. out:
  926. if (IS_IGDNG(dev)) {
  927. u32 pwm;
  928. /* make sure PWM is enabled */
  929. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  930. pwm |= (PWM_ENABLE | PWM_PIPE_B);
  931. I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
  932. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  933. pwm |= PWM_PCH_ENABLE;
  934. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  935. }
  936. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  937. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  938. DRM_DEBUG("lid notifier registration failed\n");
  939. dev_priv->lid_notifier.notifier_call = NULL;
  940. }
  941. drm_sysfs_connector_add(connector);
  942. return;
  943. failed:
  944. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  945. if (intel_output->ddc_bus)
  946. intel_i2c_destroy(intel_output->ddc_bus);
  947. drm_connector_cleanup(connector);
  948. kfree(intel_output);
  949. }