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@@ -495,12 +495,12 @@ static void enable_chip(struct ipath_devdata *dd,
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* head values to match.
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*/
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val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
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- (void)ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
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+ ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
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/* Initialize so we interrupt on next packet received */
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- (void)ipath_write_ureg(dd, ur_rcvhdrhead,
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- dd->ipath_rhdrhead_intr_off |
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- dd->ipath_pd[0]->port_head, 0);
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+ ipath_write_ureg(dd, ur_rcvhdrhead,
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+ dd->ipath_rhdrhead_intr_off |
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+ dd->ipath_pd[0]->port_head, 0);
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/*
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* by now pioavail updates to memory should have occurred, so
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@@ -769,8 +769,8 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
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goto done;
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}
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- (void)ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
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- dd->ipath_pioavailregs_phys);
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+ ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
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+ dd->ipath_pioavailregs_phys);
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/*
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* this is to detect s/w errors, which the h/w works around by
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* ignoring the low 6 bits of address, if it wasn't aligned.
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