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@@ -1142,7 +1142,24 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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const char *vers;
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int i;
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int intvec_top;
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- u64 paddr = phys_addr;
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+
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+ /*
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+ * If no phyiscal address was specified then all of the phyiscal
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+ * addressing parameters must come from the device-tree.
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+ */
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+ if (!phys_addr) {
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+ BUG_ON(!node);
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+
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+ /* Check if it is DCR-based */
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+ if (of_get_property(node, "dcr-reg", NULL)) {
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+ flags |= MPIC_USES_DCR;
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+ } else {
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+ struct resource r;
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+ if (of_address_to_resource(node, 0, &r))
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+ return NULL;
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+ phys_addr = r.start;
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+ }
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+ }
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mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
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if (mpic == NULL)
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@@ -1224,35 +1241,25 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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#endif
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/* default register type */
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- mpic->reg_type = (flags & MPIC_BIG_ENDIAN) ?
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- mpic_access_mmio_be : mpic_access_mmio_le;
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-
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- /* If no physical address is passed in, a device-node is mandatory */
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- BUG_ON(paddr == 0 && node == NULL);
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+ if (flags & MPIC_BIG_ENDIAN)
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+ mpic->reg_type = mpic_access_mmio_be;
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+ else
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+ mpic->reg_type = mpic_access_mmio_le;
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- /* If no physical address passed in, check if it's dcr based */
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- if (paddr == 0 && of_get_property(node, "dcr-reg", NULL) != NULL) {
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+ /*
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+ * An MPIC with a "dcr-reg" property must be accessed that way, but
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+ * only if the kernel includes DCR support.
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+ */
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#ifdef CONFIG_PPC_DCR
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- mpic->flags |= MPIC_USES_DCR;
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+ if (flags & MPIC_USES_DCR)
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mpic->reg_type = mpic_access_dcr;
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#else
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- BUG();
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-#endif /* CONFIG_PPC_DCR */
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- }
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-
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- /* If the MPIC is not DCR based, and no physical address was passed
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- * in, try to obtain one
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- */
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- if (paddr == 0 && !(mpic->flags & MPIC_USES_DCR)) {
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- const u32 *reg = of_get_property(node, "reg", NULL);
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- BUG_ON(reg == NULL);
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- paddr = of_translate_address(node, reg);
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- BUG_ON(paddr == OF_BAD_ADDR);
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- }
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+ BUG_ON(flags & MPIC_USES_DCR);
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+#endif
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/* Map the global registers */
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- mpic_map(mpic, node, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
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- mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
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+ mpic_map(mpic, node, phys_addr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
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+ mpic_map(mpic, node, phys_addr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
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/* Reset */
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@@ -1307,7 +1314,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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for_each_possible_cpu(i) {
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unsigned int cpu = get_hard_smp_processor_id(i);
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- mpic_map(mpic, node, paddr, &mpic->cpuregs[cpu],
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+ mpic_map(mpic, node, phys_addr, &mpic->cpuregs[cpu],
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MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
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0x1000);
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}
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@@ -1315,7 +1322,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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/* Initialize main ISU if none provided */
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if (mpic->isu_size == 0) {
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mpic->isu_size = mpic->num_sources;
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- mpic_map(mpic, node, paddr, &mpic->isus[0],
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+ mpic_map(mpic, node, phys_addr, &mpic->isus[0],
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MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
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}
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mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
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@@ -1347,7 +1354,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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}
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printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx,"
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" max %d CPUs\n",
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- name, vers, (unsigned long long)paddr, num_possible_cpus());
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+ name, vers, (unsigned long long)phys_addr, num_possible_cpus());
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printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n",
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mpic->isu_size, mpic->isu_shift, mpic->isu_mask);
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