sbc8560.c 6.5 KB

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  1. /*
  2. * Wind River SBC8560 setup and early boot code.
  3. *
  4. * Copyright 2007 Wind River Systems Inc.
  5. *
  6. * By Paul Gortmaker (see MAINTAINERS for contact information)
  7. *
  8. * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/stddef.h>
  16. #include <linux/kernel.h>
  17. #include <linux/pci.h>
  18. #include <linux/kdev_t.h>
  19. #include <linux/delay.h>
  20. #include <linux/seq_file.h>
  21. #include <linux/of_platform.h>
  22. #include <asm/system.h>
  23. #include <asm/time.h>
  24. #include <asm/machdep.h>
  25. #include <asm/pci-bridge.h>
  26. #include <asm/mpic.h>
  27. #include <mm/mmu_decl.h>
  28. #include <asm/udbg.h>
  29. #include <sysdev/fsl_soc.h>
  30. #include <sysdev/fsl_pci.h>
  31. #include "mpc85xx.h"
  32. #ifdef CONFIG_CPM2
  33. #include <asm/cpm2.h>
  34. #include <sysdev/cpm2_pic.h>
  35. #endif
  36. static void __init sbc8560_pic_init(void)
  37. {
  38. struct mpic *mpic;
  39. struct device_node *np = NULL;
  40. np = of_find_node_by_type(np, "open-pic");
  41. if (!np) {
  42. printk(KERN_ERR "Could not find open-pic node\n");
  43. return;
  44. }
  45. mpic = mpic_alloc(np, 0,
  46. MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  47. 0, 256, " OpenPIC ");
  48. BUG_ON(mpic == NULL);
  49. of_node_put(np);
  50. mpic_init(mpic);
  51. mpc85xx_cpm2_pic_init();
  52. }
  53. /*
  54. * Setup the architecture
  55. */
  56. #ifdef CONFIG_CPM2
  57. struct cpm_pin {
  58. int port, pin, flags;
  59. };
  60. static const struct cpm_pin sbc8560_pins[] = {
  61. /* SCC1 */
  62. {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  63. {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  64. {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  65. /* SCC2 */
  66. {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  67. {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  68. {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  69. /* FCC2 */
  70. {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  71. {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  72. {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  73. {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  74. {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  75. {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  76. {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  77. {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  78. {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  79. {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  80. {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  81. {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  82. {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  83. {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  84. {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
  85. {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
  86. /* FCC3 */
  87. {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  88. {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  89. {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  90. {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  91. {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  92. {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  93. {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  94. {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  95. {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  96. {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  97. {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  98. {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  99. {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  100. {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  101. {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
  102. {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
  103. };
  104. static void __init init_ioports(void)
  105. {
  106. int i;
  107. for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
  108. const struct cpm_pin *pin = &sbc8560_pins[i];
  109. cpm2_set_pin(pin->port, pin->pin, pin->flags);
  110. }
  111. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
  112. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
  113. cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
  114. cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
  115. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
  116. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
  117. cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
  118. cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
  119. }
  120. #endif
  121. static void __init sbc8560_setup_arch(void)
  122. {
  123. #ifdef CONFIG_PCI
  124. struct device_node *np;
  125. #endif
  126. if (ppc_md.progress)
  127. ppc_md.progress("sbc8560_setup_arch()", 0);
  128. #ifdef CONFIG_CPM2
  129. cpm2_reset();
  130. init_ioports();
  131. #endif
  132. #ifdef CONFIG_PCI
  133. for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
  134. fsl_add_bridge(np, 1);
  135. #endif
  136. }
  137. static void sbc8560_show_cpuinfo(struct seq_file *m)
  138. {
  139. uint pvid, svid, phid1;
  140. pvid = mfspr(SPRN_PVR);
  141. svid = mfspr(SPRN_SVR);
  142. seq_printf(m, "Vendor\t\t: Wind River\n");
  143. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  144. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  145. /* Display cpu Pll setting */
  146. phid1 = mfspr(SPRN_HID1);
  147. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  148. }
  149. machine_device_initcall(sbc8560, mpc85xx_common_publish_devices);
  150. /*
  151. * Called very early, device-tree isn't unflattened
  152. */
  153. static int __init sbc8560_probe(void)
  154. {
  155. unsigned long root = of_get_flat_dt_root();
  156. return of_flat_dt_is_compatible(root, "SBC8560");
  157. }
  158. #ifdef CONFIG_RTC_DRV_M48T59
  159. static int __init sbc8560_rtc_init(void)
  160. {
  161. struct device_node *np;
  162. struct resource res;
  163. struct platform_device *rtc_dev;
  164. np = of_find_compatible_node(NULL, NULL, "m48t59");
  165. if (np == NULL) {
  166. printk("No RTC in DTB. Has it been eaten by wild dogs?\n");
  167. return -ENODEV;
  168. }
  169. of_address_to_resource(np, 0, &res);
  170. of_node_put(np);
  171. printk("Found RTC (m48t59) at i/o 0x%x\n", res.start);
  172. rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1);
  173. if (IS_ERR(rtc_dev)) {
  174. printk("Registering sbc8560 RTC device failed\n");
  175. return PTR_ERR(rtc_dev);
  176. }
  177. return 0;
  178. }
  179. arch_initcall(sbc8560_rtc_init);
  180. #endif /* M48T59 */
  181. static __u8 __iomem *brstcr;
  182. static int __init sbc8560_bdrstcr_init(void)
  183. {
  184. struct device_node *np;
  185. struct resource res;
  186. np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr");
  187. if (np == NULL) {
  188. printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n");
  189. return -ENODEV;
  190. }
  191. of_address_to_resource(np, 0, &res);
  192. printk(KERN_INFO "sbc8560: Found BRSTCR at %pR\n", &res);
  193. brstcr = ioremap(res.start, resource_size(&res));
  194. if(!brstcr)
  195. printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n");
  196. of_node_put(np);
  197. return 0;
  198. }
  199. arch_initcall(sbc8560_bdrstcr_init);
  200. void sbc8560_rstcr_restart(char * cmd)
  201. {
  202. local_irq_disable();
  203. if(brstcr)
  204. clrbits8(brstcr, 0x80);
  205. while(1);
  206. }
  207. define_machine(sbc8560) {
  208. .name = "SBC8560",
  209. .probe = sbc8560_probe,
  210. .setup_arch = sbc8560_setup_arch,
  211. .init_IRQ = sbc8560_pic_init,
  212. .show_cpuinfo = sbc8560_show_cpuinfo,
  213. .get_irq = mpic_get_irq,
  214. .restart = sbc8560_rstcr_restart,
  215. .calibrate_decr = generic_calibrate_decr,
  216. .progress = udbg_progress,
  217. };