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@@ -70,30 +70,92 @@ static struct pci_device_id oxygen_ids[] __devinitdata = {
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};
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MODULE_DEVICE_TABLE(pci, oxygen_ids);
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+
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+#define GPIO_AK5385_DFS_MASK 0x0003
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+#define GPIO_AK5385_DFS_NORMAL 0x0000
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+#define GPIO_AK5385_DFS_DOUBLE 0x0001
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+#define GPIO_AK5385_DFS_QUAD 0x0002
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+
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#define AK4396_WRITE 0x2000
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-/* register 0 */
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+#define AK4396_CONTROL_1 0
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+#define AK4396_CONTROL_2 1
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+#define AK4396_CONTROL_3 2
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+#define AK4396_LCH_ATT 3
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+#define AK4396_RCH_ATT 4
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+
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+/* control 1 */
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#define AK4396_RSTN 0x01
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+#define AK4396_DIF_MASK 0x0e
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+#define AK4396_DIF_16_LSB 0x00
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+#define AK4396_DIF_20_LSB 0x02
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#define AK4396_DIF_24_MSB 0x04
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-/* register 1 */
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+#define AK4396_DIF_24_I2S 0x06
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+#define AK4396_DIF_24_LSB 0x08
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+#define AK4396_ACKS 0x80
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+/* control 2 */
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#define AK4396_SMUTE 0x01
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+#define AK4396_DEM_MASK 0x06
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+#define AK4396_DEM_441 0x00
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#define AK4396_DEM_OFF 0x02
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+#define AK4396_DEM_48 0x04
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+#define AK4396_DEM_32 0x06
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#define AK4396_DFS_MASK 0x18
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#define AK4396_DFS_NORMAL 0x00
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#define AK4396_DFS_DOUBLE 0x08
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#define AK4396_DFS_QUAD 0x10
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-
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-/* register 0 */
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+#define AK4396_SLOW 0x20
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+#define AK4396_DZFM 0x40
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+#define AK4396_DZFE 0x80
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+/* control 3 */
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+#define AK4396_DZFB 0x04
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+#define AK4396_DCKB 0x10
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+#define AK4396_DCKS 0x20
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+#define AK4396_DSDM 0x40
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+#define AK4396_D_P_MASK 0x80
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+#define AK4396_PCM 0x00
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+#define AK4396_DSD 0x80
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+
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+#define WM8785_R0 0
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+#define WM8785_R1 1
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+#define WM8785_R2 2
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+#define WM8785_R7 7
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+
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+/* R0 */
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+#define WM8785_MCR_MASK 0x007
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+#define WM8785_MCR_SLAVE 0x000
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+#define WM8785_MCR_MASTER_128 0x001
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+#define WM8785_MCR_MASTER_192 0x002
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+#define WM8785_MCR_MASTER_256 0x003
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+#define WM8785_MCR_MASTER_384 0x004
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+#define WM8785_MCR_MASTER_512 0x005
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+#define WM8785_MCR_MASTER_768 0x006
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+#define WM8785_OSR_MASK 0x018
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#define WM8785_OSR_SINGLE 0x000
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#define WM8785_OSR_DOUBLE 0x008
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#define WM8785_OSR_QUAD 0x010
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+#define WM8785_FORMAT_MASK 0x060
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+#define WM8785_FORMAT_RJUST 0x000
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#define WM8785_FORMAT_LJUST 0x020
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#define WM8785_FORMAT_I2S 0x040
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-/* register 1 */
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+#define WM8785_FORMAT_DSP 0x060
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+/* R1 */
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+#define WM8785_WL_MASK 0x003
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#define WM8785_WL_16 0x000
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#define WM8785_WL_20 0x001
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#define WM8785_WL_24 0x002
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#define WM8785_WL_32 0x003
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+#define WM8785_LRP 0x004
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+#define WM8785_BCLKINV 0x008
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+#define WM8785_LRSWAP 0x010
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+#define WM8785_DEVNO_MASK 0x0e0
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+/* R2 */
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+#define WM8785_HPFR 0x001
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+#define WM8785_HPFL 0x002
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+#define WM8785_SDODIS 0x004
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+#define WM8785_PWRDNR 0x008
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+#define WM8785_PWRDNL 0x010
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+#define WM8785_TDM_MASK 0x1c0
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static void ak4396_write(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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@@ -124,29 +186,33 @@ static void ak4396_init(struct oxygen *chip)
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{
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unsigned int i;
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- chip->ak4396_reg1 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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+ chip->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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for (i = 0; i < 4; ++i) {
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- ak4396_write(chip, i, 0, AK4396_DIF_24_MSB | AK4396_RSTN);
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- ak4396_write(chip, i, 1, chip->ak4396_reg1);
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- ak4396_write(chip, i, 2, 0);
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- ak4396_write(chip, i, 3, 0xff);
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- ak4396_write(chip, i, 4, 0xff);
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+ ak4396_write(chip, i,
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+ AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
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+ ak4396_write(chip, i,
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+ AK4396_CONTROL_2, chip->ak4396_ctl2);
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+ ak4396_write(chip, i,
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+ AK4396_CONTROL_3, AK4396_PCM);
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+ ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
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+ ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
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}
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snd_component_add(chip->card, "AK4396");
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}
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static void ak5385_init(struct oxygen *chip)
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{
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- oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 0x0003);
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- oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, 0x0003);
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+ oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
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+ oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
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snd_component_add(chip->card, "AK5385");
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}
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static void wm8785_init(struct oxygen *chip)
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{
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- wm8785_write(chip, 7, 0);
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- wm8785_write(chip, 0, WM8785_FORMAT_LJUST | WM8785_OSR_SINGLE);
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- wm8785_write(chip, 1, WM8785_WL_24);
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+ wm8785_write(chip, WM8785_R7, 0);
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+ wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
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+ WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
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+ wm8785_write(chip, WM8785_R1, WM8785_WL_24);
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snd_component_add(chip->card, "WM8785");
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}
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@@ -184,18 +250,21 @@ static void set_ak4396_params(struct oxygen *chip,
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unsigned int i;
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u8 value;
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- value = chip->ak4396_reg1 & ~AK4396_DFS_MASK;
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+ value = chip->ak4396_ctl2 & ~AK4396_DFS_MASK;
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if (params_rate(params) <= 54000)
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value |= AK4396_DFS_NORMAL;
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else if (params_rate(params) < 120000)
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value |= AK4396_DFS_DOUBLE;
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else
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value |= AK4396_DFS_QUAD;
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- chip->ak4396_reg1 = value;
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+ chip->ak4396_ctl2 = value;
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for (i = 0; i < 4; ++i) {
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- ak4396_write(chip, i, 0, AK4396_DIF_24_MSB);
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- ak4396_write(chip, i, 1, value);
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- ak4396_write(chip, i, 0, AK4396_DIF_24_MSB | AK4396_RSTN);
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+ ak4396_write(chip, i,
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+ AK4396_CONTROL_1, AK4396_DIF_24_MSB);
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+ ak4396_write(chip, i,
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+ AK4396_CONTROL_2, value);
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+ ak4396_write(chip, i,
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+ AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
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}
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}
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@@ -204,8 +273,10 @@ static void update_ak4396_volume(struct oxygen *chip)
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unsigned int i;
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for (i = 0; i < 4; ++i) {
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- ak4396_write(chip, i, 3, chip->dac_volume[i * 2]);
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- ak4396_write(chip, i, 4, chip->dac_volume[i * 2 + 1]);
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+ ak4396_write(chip, i,
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+ AK4396_LCH_ATT, chip->dac_volume[i * 2]);
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+ ak4396_write(chip, i,
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+ AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
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}
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}
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@@ -214,11 +285,11 @@ static void update_ak4396_mute(struct oxygen *chip)
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unsigned int i;
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u8 value;
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- value = chip->ak4396_reg1 & ~AK4396_SMUTE;
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+ value = chip->ak4396_ctl2 & ~AK4396_SMUTE;
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if (chip->dac_mute)
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value |= AK4396_SMUTE;
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for (i = 0; i < 4; ++i)
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- ak4396_write(chip, i, 1, value);
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+ ak4396_write(chip, i, AK4396_CONTROL_2, value);
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}
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static void set_wm8785_params(struct oxygen *chip,
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@@ -226,22 +297,22 @@ static void set_wm8785_params(struct oxygen *chip,
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{
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unsigned int value;
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- wm8785_write(chip, 7, 0);
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+ wm8785_write(chip, WM8785_R7, 0);
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- value = WM8785_FORMAT_LJUST;
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+ value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
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if (params_rate(params) == 96000)
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value |= WM8785_OSR_DOUBLE;
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else if (params_rate(params) == 192000)
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value |= WM8785_OSR_QUAD;
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else
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value |= WM8785_OSR_SINGLE;
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- wm8785_write(chip, 0, value);
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+ wm8785_write(chip, WM8785_R0, value);
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if (snd_pcm_format_width(params_format(params)) <= 16)
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value = WM8785_WL_16;
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else
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value = WM8785_WL_24;
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- wm8785_write(chip, 1, value);
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+ wm8785_write(chip, WM8785_R1, value);
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}
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static void set_ak5385_params(struct oxygen *chip,
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@@ -250,12 +321,13 @@ static void set_ak5385_params(struct oxygen *chip,
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unsigned int value;
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if (params_rate(params) <= 54000)
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- value = 0;
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+ value = GPIO_AK5385_DFS_NORMAL;
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else if (params_rate(params) <= 108000)
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- value = 1;
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+ value = GPIO_AK5385_DFS_DOUBLE;
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else
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- value = 2;
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- oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, value, 0x0003);
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+ value = GPIO_AK5385_DFS_QUAD;
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+ oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
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+ value, GPIO_AK5385_DFS_MASK);
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}
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static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
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