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@@ -12,6 +12,7 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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+#undef DEBUG
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#include <linux/module.h>
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#include <linux/kernel.h>
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@@ -31,9 +32,42 @@
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#include <mach/sdrc.h>
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#include "sdrc.h"
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+static struct omap_sdrc_params *sdrc_init_params;
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+
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void __iomem *omap2_sdrc_base;
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void __iomem *omap2_sms_base;
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+
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+/**
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+ * omap2_sdrc_get_params - return SDRC register values for a given clock rate
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+ * @r: SDRC clock rate (in Hz)
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+ *
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+ * Return pre-calculated values for the SDRC_ACTIM_CTRLA,
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+ * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL, and SDRC_MR registers, for a given
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+ * SDRC clock rate 'r'. These parameters control various timing
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+ * delays in the SDRAM controller that are expressed in terms of the
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+ * number of SDRC clock cycles to wait; hence the clock rate
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+ * dependency. Note that sdrc_init_params must be sorted rate
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+ * descending. Also assumes that both chip-selects use the same
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+ * timing parameters. Returns a struct omap_sdrc_params * upon
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+ * success, or NULL upon failure.
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+ */
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+struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r)
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+{
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+ struct omap_sdrc_params *sp;
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+
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+ sp = sdrc_init_params;
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+
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+ while (sp->rate != r)
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+ sp++;
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+
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+ if (!sp->rate)
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+ return NULL;
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+
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+ return sp;
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+}
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+
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+
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void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
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{
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omap2_sdrc_base = omap2_globals->sdrc;
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@@ -41,7 +75,7 @@ void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
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}
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/* turn on smart idle modes for SDRAM scheduler and controller */
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-void __init omap2_sdrc_init(void)
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+void __init omap2_sdrc_init(struct omap_sdrc_params *sp)
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{
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u32 l;
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@@ -54,4 +88,6 @@ void __init omap2_sdrc_init(void)
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l &= ~(0x3 << 3);
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l |= (0x2 << 3);
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sdrc_write_reg(l, SDRC_SYSCONFIG);
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+
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+ sdrc_init_params = sp;
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}
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