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@@ -267,7 +267,8 @@
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* streaming input/output */
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INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006,
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INSN_CONFIG_SET_COUNTER_MODE = 4097,
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- INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, /* deprecated */
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+ /* INSN_CONFIG_8254_SET_MODE is deprecated */
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+ INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE,
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INSN_CONFIG_8254_READ_STATUS = 4098,
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INSN_CONFIG_SET_ROUTING = 4099,
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INSN_CONFIG_GET_ROUTING = 4109,
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@@ -598,14 +599,17 @@
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NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
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NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
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NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
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- NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, /* NI 660x-specific */
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+ /* NI 660x-specific */
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+ NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6,
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NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
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NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
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NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
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NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
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NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
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- NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, /* divide source by 2 */
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- NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, /* divide source by 8 */
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+ /* divide source by 2 */
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+ NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000,
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+ /* divide source by 8 */
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+ NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000,
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NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
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};
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static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n)
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@@ -837,7 +841,8 @@ INSN_CONFIG_ARM */
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{
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return NI_USUAL_PFI_SELECT(pfi_channel);
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}
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- static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
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+ static inline unsigned
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+ NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
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{
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return NI_USUAL_RTSI_SELECT(rtsi_channel);
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}
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