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@@ -49,7 +49,7 @@ static int kv_set_thermal_temperature_range(struct radeon_device *rdev,
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int min_temp, int max_temp);
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static int kv_init_fps_limits(struct radeon_device *rdev);
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-static void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
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+void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
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static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate);
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static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate);
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static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate);
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@@ -59,6 +59,10 @@ extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
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extern void cik_update_cg(struct radeon_device *rdev,
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u32 block, bool enable);
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+extern void cik_uvd_resume(struct radeon_device *rdev);
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+extern int r600_uvd_init(struct radeon_device *rdev, bool ring_test);
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+extern void r600_do_uvd_stop(struct radeon_device *rdev);
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+
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static const struct kv_lcac_config_values sx_local_cac_cfg_kv[] =
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{
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{ 0, 4, 1 },
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@@ -1201,6 +1205,7 @@ int kv_dpm_enable(struct radeon_device *rdev)
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kv_dpm_powergate_acp(rdev, true);
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kv_dpm_powergate_samu(rdev, true);
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kv_dpm_powergate_vce(rdev, true);
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+ kv_dpm_powergate_uvd(rdev, true);
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kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
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@@ -1458,7 +1463,7 @@ static int kv_update_acp_dpm(struct radeon_device *rdev, bool gate)
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return kv_enable_acp_dpm(rdev, !gate);
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}
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-static void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate)
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+void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate)
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{
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struct kv_power_info *pi = kv_get_pi(rdev);
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@@ -1468,13 +1473,18 @@ static void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate)
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pi->uvd_power_gated = gate;
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if (gate) {
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- kv_update_uvd_dpm(rdev, true);
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+ r600_do_uvd_stop(rdev);
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+ cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);
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+ kv_update_uvd_dpm(rdev, gate);
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if (pi->caps_uvd_pg)
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kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF);
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} else {
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if (pi->caps_uvd_pg)
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kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON);
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- kv_update_uvd_dpm(rdev, false);
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+ cik_uvd_resume(rdev);
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+ r600_uvd_init(rdev, false);
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+ cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);
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+ kv_update_uvd_dpm(rdev, gate);
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}
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}
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@@ -1714,7 +1724,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
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return ret;
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}
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#endif
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- kv_update_uvd_dpm(rdev, false);
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kv_update_sclk_t(rdev);
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}
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} else {
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@@ -1740,7 +1749,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
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return ret;
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}
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#endif
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- kv_update_uvd_dpm(rdev, false);
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kv_update_sclk_t(rdev);
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kv_enable_nb_dpm(rdev);
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}
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@@ -2502,7 +2510,7 @@ int kv_dpm_init(struct radeon_device *rdev)
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pi->voltage_drop_t = 0;
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pi->caps_sclk_throttle_low_notification = false;
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pi->caps_fps = false; /* true? */
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- pi->caps_uvd_pg = false; /* XXX */
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+ pi->caps_uvd_pg = true;
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pi->caps_uvd_dpm = true;
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pi->caps_vce_pg = false;
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pi->caps_samu_pg = false;
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