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@@ -2354,6 +2354,8 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
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if (mode->clock * 3 > 27000 * 4)
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return MODE_CLOCK_HIGH;
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}
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+
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+ drm_mode_set_crtcinfo(adjusted_mode, 0);
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return true;
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}
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@@ -3781,6 +3783,18 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
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}
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}
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+ if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
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+ pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
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+ /* the chip adds 2 halflines automatically */
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+ adjusted_mode->crtc_vdisplay -= 1;
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+ adjusted_mode->crtc_vtotal -= 1;
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+ adjusted_mode->crtc_vblank_start -= 1;
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+ adjusted_mode->crtc_vblank_end -= 1;
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+ adjusted_mode->crtc_vsync_end -= 1;
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+ adjusted_mode->crtc_vsync_start -= 1;
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+ } else
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+ pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
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+
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I915_WRITE(htot_reg, (adjusted_mode->crtc_hdisplay - 1) |
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((adjusted_mode->crtc_htotal - 1) << 16));
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I915_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) |
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