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@@ -2176,24 +2176,27 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r
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}
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}
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}
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}
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-static u16 radeon_atombios_get_default_vddc(struct radeon_device *rdev)
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+static void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
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+ u16 *vddc, u16 *vddci)
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{
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{
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struct radeon_mode_info *mode_info = &rdev->mode_info;
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struct radeon_mode_info *mode_info = &rdev->mode_info;
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int index = GetIndexIntoMasterTable(DATA, FirmwareInfo);
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int index = GetIndexIntoMasterTable(DATA, FirmwareInfo);
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u8 frev, crev;
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u8 frev, crev;
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u16 data_offset;
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u16 data_offset;
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union firmware_info *firmware_info;
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union firmware_info *firmware_info;
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- u16 vddc = 0;
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+
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+ *vddc = 0;
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+ *vddci = 0;
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if (atom_parse_data_header(mode_info->atom_context, index, NULL,
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if (atom_parse_data_header(mode_info->atom_context, index, NULL,
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&frev, &crev, &data_offset)) {
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&frev, &crev, &data_offset)) {
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firmware_info =
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firmware_info =
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(union firmware_info *)(mode_info->atom_context->bios +
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(union firmware_info *)(mode_info->atom_context->bios +
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data_offset);
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data_offset);
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- vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage);
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+ *vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage);
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+ if ((frev == 2) && (crev >= 2))
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+ *vddci = le16_to_cpu(firmware_info->info_22.usBootUpVDDCIVoltage);
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}
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}
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-
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- return vddc;
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}
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}
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static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rdev,
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static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rdev,
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@@ -2203,7 +2206,9 @@ static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rde
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int j;
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int j;
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u32 misc = le32_to_cpu(non_clock_info->ulCapsAndSettings);
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u32 misc = le32_to_cpu(non_clock_info->ulCapsAndSettings);
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u32 misc2 = le16_to_cpu(non_clock_info->usClassification);
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u32 misc2 = le16_to_cpu(non_clock_info->usClassification);
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- u16 vddc = radeon_atombios_get_default_vddc(rdev);
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+ u16 vddc, vddci;
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+
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+ radeon_atombios_get_default_voltages(rdev, &vddc, &vddci);
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rdev->pm.power_state[state_index].misc = misc;
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rdev->pm.power_state[state_index].misc = misc;
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rdev->pm.power_state[state_index].misc2 = misc2;
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rdev->pm.power_state[state_index].misc2 = misc2;
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@@ -2244,6 +2249,7 @@ static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rde
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rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk;
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rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk;
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rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk;
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rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk;
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rdev->pm.default_vddc = rdev->pm.power_state[state_index].clock_info[0].voltage.voltage;
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rdev->pm.default_vddc = rdev->pm.power_state[state_index].clock_info[0].voltage.voltage;
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+ rdev->pm.default_vddci = rdev->pm.power_state[state_index].clock_info[0].voltage.vddci;
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} else {
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} else {
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/* patch the table values with the default slck/mclk from firmware info */
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/* patch the table values with the default slck/mclk from firmware info */
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for (j = 0; j < mode_index; j++) {
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for (j = 0; j < mode_index; j++) {
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@@ -2286,6 +2292,8 @@ static bool radeon_atombios_parse_pplib_clock_info(struct radeon_device *rdev,
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VOLTAGE_SW;
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VOLTAGE_SW;
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rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage =
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rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage =
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le16_to_cpu(clock_info->evergreen.usVDDC);
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le16_to_cpu(clock_info->evergreen.usVDDC);
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+ rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci =
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+ le16_to_cpu(clock_info->evergreen.usVDDCI);
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} else {
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} else {
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sclk = le16_to_cpu(clock_info->r600.usEngineClockLow);
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sclk = le16_to_cpu(clock_info->r600.usEngineClockLow);
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sclk |= clock_info->r600.ucEngineClockHigh << 16;
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sclk |= clock_info->r600.ucEngineClockHigh << 16;
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@@ -2577,25 +2585,25 @@ union set_voltage {
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struct _SET_VOLTAGE_PARAMETERS_V2 v2;
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struct _SET_VOLTAGE_PARAMETERS_V2 v2;
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};
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};
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-void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level)
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+void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type)
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{
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{
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union set_voltage args;
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union set_voltage args;
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int index = GetIndexIntoMasterTable(COMMAND, SetVoltage);
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int index = GetIndexIntoMasterTable(COMMAND, SetVoltage);
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- u8 frev, crev, volt_index = level;
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+ u8 frev, crev, volt_index = voltage_level;
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if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
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if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
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return;
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return;
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switch (crev) {
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switch (crev) {
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case 1:
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case 1:
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- args.v1.ucVoltageType = SET_VOLTAGE_TYPE_ASIC_VDDC;
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+ args.v1.ucVoltageType = voltage_type;
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args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE;
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args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE;
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args.v1.ucVoltageIndex = volt_index;
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args.v1.ucVoltageIndex = volt_index;
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break;
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break;
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case 2:
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case 2:
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- args.v2.ucVoltageType = SET_VOLTAGE_TYPE_ASIC_VDDC;
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+ args.v2.ucVoltageType = voltage_type;
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args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE;
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args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE;
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- args.v2.usVoltageLevel = cpu_to_le16(level);
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+ args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
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break;
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break;
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default:
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default:
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DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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