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@@ -49,6 +49,7 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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+#include <asm/mach/pci.h>
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#include <asm/mach/time.h>
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#include <plat/fpga-irq.h>
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@@ -72,7 +73,7 @@
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* e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
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* ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
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* ed000000 62000000 PCI V3 regs PHYS_PCI_V3_BASE (max 64k)
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- * ee000000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
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+ * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
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* ef000000 Cache flush
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* f1000000 10000000 Core module registers
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* f1100000 11000000 System controller registers
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@@ -146,11 +147,6 @@ static struct map_desc ap_io_desc[] __initdata = {
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.pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
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.length = SZ_64K,
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.type = MT_DEVICE
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- }, {
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- .virtual = PCI_IO_VADDR,
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- .pfn = __phys_to_pfn(PHYS_PCI_IO_BASE),
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- .length = SZ_64K,
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- .type = MT_DEVICE
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}
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};
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@@ -158,6 +154,7 @@ static void __init ap_map_io(void)
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{
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iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
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vga_base = PCI_MEMORY_VADDR;
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+ pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
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}
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#define INTEGRATOR_SC_VALID_INT 0x003fffff
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