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@@ -96,7 +96,7 @@ static char mv643xx_eth_driver_version[] = "1.0";
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#define TX_BW_MTU(p) (0x0458 + ((p) << 10))
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#define TX_BW_BURST(p) (0x045c + ((p) << 10))
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#define INT_CAUSE(p) (0x0460 + ((p) << 10))
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-#define INT_RX 0x00000804
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+#define INT_RX 0x0007fbfc
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#define INT_EXT 0x00000002
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#define INT_CAUSE_EXT(p) (0x0464 + ((p) << 10))
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#define INT_EXT_LINK 0x00100000
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@@ -107,7 +107,7 @@ static char mv643xx_eth_driver_version[] = "1.0";
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#define INT_MASK(p) (0x0468 + ((p) << 10))
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#define INT_MASK_EXT(p) (0x046c + ((p) << 10))
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#define TX_FIFO_URGENT_THRESHOLD(p) (0x0474 + ((p) << 10))
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-#define RXQ_CURRENT_DESC_PTR(p) (0x060c + ((p) << 10))
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+#define RXQ_CURRENT_DESC_PTR(p, q) (0x060c + ((p) << 10) + ((q) << 4))
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#define RXQ_COMMAND(p) (0x0680 + ((p) << 10))
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#define TXQ_CURRENT_DESC_PTR(p) (0x06c0 + ((p) << 10))
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#define TXQ_BW_TOKENS(p) (0x0700 + ((p) << 10))
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@@ -286,6 +286,8 @@ struct mib_counters {
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};
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struct rx_queue {
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+ int index;
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+
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int rx_ring_size;
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int rx_desc_count;
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@@ -334,8 +336,10 @@ struct mv643xx_eth_private {
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int default_rx_ring_size;
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unsigned long rx_desc_sram_addr;
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int rx_desc_sram_size;
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+ u8 rxq_mask;
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+ int rxq_primary;
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struct napi_struct napi;
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- struct rx_queue rxq[1];
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+ struct rx_queue rxq[8];
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/*
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* TX state.
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@@ -365,7 +369,7 @@ static inline void wrl(struct mv643xx_eth_private *mp, int offset, u32 data)
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/* rxq/txq helper functions *************************************************/
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static struct mv643xx_eth_private *rxq_to_mp(struct rx_queue *rxq)
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{
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- return container_of(rxq, struct mv643xx_eth_private, rxq[0]);
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+ return container_of(rxq, struct mv643xx_eth_private, rxq[rxq->index]);
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}
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static struct mv643xx_eth_private *txq_to_mp(struct tx_queue *txq)
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@@ -376,13 +380,13 @@ static struct mv643xx_eth_private *txq_to_mp(struct tx_queue *txq)
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static void rxq_enable(struct rx_queue *rxq)
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{
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struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
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- wrl(mp, RXQ_COMMAND(mp->port_num), 1);
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+ wrl(mp, RXQ_COMMAND(mp->port_num), 1 << rxq->index);
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}
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static void rxq_disable(struct rx_queue *rxq)
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{
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struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
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- u8 mask = 1;
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+ u8 mask = 1 << rxq->index;
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wrl(mp, RXQ_COMMAND(mp->port_num), mask << 8);
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while (rdl(mp, RXQ_COMMAND(mp->port_num)) & mask)
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@@ -583,6 +587,7 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
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{
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struct mv643xx_eth_private *mp;
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int rx;
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+ int i;
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mp = container_of(napi, struct mv643xx_eth_private, napi);
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@@ -593,7 +598,10 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
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}
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#endif
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- rx = rxq_process(mp->rxq, budget);
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+ rx = 0;
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+ for (i = 7; rx < budget && i >= 0; i--)
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+ if (mp->rxq_mask & (1 << i))
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+ rx += rxq_process(mp->rxq + i, budget - rx);
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if (rx < budget) {
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netif_rx_complete(mp->dev, napi);
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@@ -1306,13 +1314,15 @@ static void mv643xx_eth_set_rx_mode(struct net_device *dev)
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/* rx/tx queue initialisation ***********************************************/
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-static int rxq_init(struct mv643xx_eth_private *mp)
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+static int rxq_init(struct mv643xx_eth_private *mp, int index)
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{
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- struct rx_queue *rxq = mp->rxq;
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+ struct rx_queue *rxq = mp->rxq + index;
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struct rx_desc *rx_desc;
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int size;
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int i;
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+ rxq->index = index;
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+
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rxq->rx_ring_size = mp->default_rx_ring_size;
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rxq->rx_desc_count = 0;
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@@ -1321,7 +1331,7 @@ static int rxq_init(struct mv643xx_eth_private *mp)
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size = rxq->rx_ring_size * sizeof(struct rx_desc);
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- if (size <= mp->rx_desc_sram_size) {
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+ if (index == mp->rxq_primary && size <= mp->rx_desc_sram_size) {
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rxq->rx_desc_area = ioremap(mp->rx_desc_sram_addr,
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mp->rx_desc_sram_size);
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rxq->rx_desc_dma = mp->rx_desc_sram_addr;
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@@ -1362,7 +1372,7 @@ static int rxq_init(struct mv643xx_eth_private *mp)
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out_free:
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- if (size <= mp->rx_desc_sram_size)
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+ if (index == mp->rxq_primary && size <= mp->rx_desc_sram_size)
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iounmap(rxq->rx_desc_area);
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else
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dma_free_coherent(NULL, size,
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@@ -1395,7 +1405,8 @@ static void rxq_deinit(struct rx_queue *rxq)
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rxq->rx_desc_count);
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}
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- if (rxq->rx_desc_area_size <= mp->rx_desc_sram_size)
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+ if (rxq->index == mp->rxq_primary &&
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+ rxq->rx_desc_area_size <= mp->rx_desc_sram_size)
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iounmap(rxq->rx_desc_area);
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else
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dma_free_coherent(NULL, rxq->rx_desc_area_size,
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@@ -1612,6 +1623,9 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id)
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}
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}
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+ /*
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+ * RxBuffer or RxError set for any of the 8 queues?
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+ */
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#ifdef MV643XX_ETH_NAPI
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if (int_cause & INT_RX) {
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wrl(mp, INT_MASK(mp->port_num), 0x00000000);
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@@ -1620,8 +1634,13 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id)
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netif_rx_schedule(dev, &mp->napi);
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}
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#else
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- if (int_cause & INT_RX)
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- rxq_process(mp->rxq, INT_MAX);
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+ if (int_cause & INT_RX) {
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+ int i;
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+
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+ for (i = 7; i >= 0; i--)
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+ if (mp->rxq_mask & (1 << i))
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+ rxq_process(mp->rxq + i, INT_MAX);
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+ }
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#endif
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if (int_cause_ext & INT_EXT_TX) {
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@@ -1707,13 +1726,16 @@ static void port_start(struct mv643xx_eth_private *mp)
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wrl(mp, PORT_CONFIG_EXT(mp->port_num), 0x00000000);
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/*
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- * Enable the receive queue.
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+ * Enable the receive queues.
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*/
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- for (i = 0; i < 1; i++) {
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- struct rx_queue *rxq = mp->rxq;
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- int off = RXQ_CURRENT_DESC_PTR(mp->port_num);
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+ for (i = 0; i < 8; i++) {
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+ struct rx_queue *rxq = mp->rxq + i;
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+ int off = RXQ_CURRENT_DESC_PTR(mp->port_num, i);
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u32 addr;
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+ if ((mp->rxq_mask & (1 << i)) == 0)
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+ continue;
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+
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addr = (u32)rxq->rx_desc_dma;
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addr += rxq->rx_curr_desc * sizeof(struct rx_desc);
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wrl(mp, off, addr);
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@@ -1748,6 +1770,7 @@ static int mv643xx_eth_open(struct net_device *dev)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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int err;
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+ int i;
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wrl(mp, INT_CAUSE(mp->port_num), 0);
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wrl(mp, INT_CAUSE_EXT(mp->port_num), 0);
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@@ -1763,10 +1786,20 @@ static int mv643xx_eth_open(struct net_device *dev)
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init_mac_tables(mp);
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- err = rxq_init(mp);
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- if (err)
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- goto out;
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- rxq_refill(mp->rxq);
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+ for (i = 0; i < 8; i++) {
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+ if ((mp->rxq_mask & (1 << i)) == 0)
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+ continue;
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+
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+ err = rxq_init(mp, i);
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+ if (err) {
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+ while (--i >= 0)
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+ if (mp->rxq_mask & (1 << i))
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+ rxq_deinit(mp->rxq + i);
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+ goto out;
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+ }
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+
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+ rxq_refill(mp->rxq + i);
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+ }
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err = txq_init(mp);
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if (err)
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@@ -1790,7 +1823,9 @@ static int mv643xx_eth_open(struct net_device *dev)
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out_free:
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- rxq_deinit(mp->rxq);
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+ for (i = 0; i < 8; i++)
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+ if (mp->rxq_mask & (1 << i))
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+ rxq_deinit(mp->rxq + i);
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out:
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free_irq(dev->irq, dev);
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@@ -1800,9 +1835,13 @@ out:
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static void port_reset(struct mv643xx_eth_private *mp)
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{
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unsigned int data;
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+ int i;
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+ for (i = 0; i < 8; i++) {
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+ if (mp->rxq_mask & (1 << i))
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+ rxq_disable(mp->rxq + i);
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+ }
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txq_disable(mp->txq);
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- rxq_disable(mp->rxq);
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while (!(rdl(mp, PORT_STATUS(mp->port_num)) & TX_FIFO_EMPTY))
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udelay(10);
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@@ -1817,6 +1856,7 @@ static void port_reset(struct mv643xx_eth_private *mp)
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static int mv643xx_eth_stop(struct net_device *dev)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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+ int i;
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wrl(mp, INT_MASK(mp->port_num), 0x00000000);
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rdl(mp, INT_MASK(mp->port_num));
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@@ -1832,8 +1872,11 @@ static int mv643xx_eth_stop(struct net_device *dev)
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port_reset(mp);
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mib_counters_update(mp);
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+ for (i = 0; i < 8; i++) {
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+ if (mp->rxq_mask & (1 << i))
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+ rxq_deinit(mp->rxq + i);
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+ }
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txq_deinit(mp->txq);
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- rxq_deinit(mp->rxq);
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return 0;
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}
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@@ -2085,6 +2128,12 @@ static void set_params(struct mv643xx_eth_private *mp,
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mp->rx_desc_sram_addr = pd->rx_sram_addr;
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mp->rx_desc_sram_size = pd->rx_sram_size;
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+ if (pd->rx_queue_mask)
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+ mp->rxq_mask = pd->rx_queue_mask;
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+ else
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+ mp->rxq_mask = 0x01;
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+ mp->rxq_primary = fls(mp->rxq_mask) - 1;
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+
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mp->default_tx_ring_size = DEFAULT_TX_QUEUE_SIZE;
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if (pd->tx_queue_size)
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mp->default_tx_ring_size = pd->tx_queue_size;
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