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@@ -30,6 +30,7 @@
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#include "radeon_reg.h"
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#include "radeon.h"
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#include "atom.h"
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+#include "r100d.h"
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#include "r420d.h"
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int r420_mc_init(struct radeon_device *rdev)
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@@ -165,6 +166,34 @@ static void r420_clock_resume(struct radeon_device *rdev)
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WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
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}
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+static void r420_cp_errata_init(struct radeon_device *rdev)
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+{
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+ /* RV410 and R420 can lock up if CP DMA to host memory happens
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+ * while the 2D engine is busy.
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+ *
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+ * The proper workaround is to queue a RESYNC at the beginning
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+ * of the CP init, apparently.
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+ */
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+ radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
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+ radeon_ring_lock(rdev, 8);
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+ radeon_ring_write(rdev, PACKET0(R300_CP_RESYNC_ADDR, 1));
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+ radeon_ring_write(rdev, rdev->config.r300.resync_scratch);
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+ radeon_ring_write(rdev, 0xDEADBEEF);
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+ radeon_ring_unlock_commit(rdev);
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+}
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+
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+static void r420_cp_errata_fini(struct radeon_device *rdev)
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+{
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+ /* Catch the RESYNC we dispatched all the way back,
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+ * at the very beginning of the CP init.
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+ */
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+ radeon_ring_lock(rdev, 8);
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+ radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
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+ radeon_ring_write(rdev, R300_RB3D_DC_FINISH);
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+ radeon_ring_unlock_commit(rdev);
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+ radeon_scratch_free(rdev, rdev->config.r300.resync_scratch);
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+}
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+
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static int r420_startup(struct radeon_device *rdev)
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{
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int r;
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@@ -196,6 +225,7 @@ static int r420_startup(struct radeon_device *rdev)
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dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
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return r;
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}
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+ r420_cp_errata_init(rdev);
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r = r100_wb_init(rdev);
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if (r) {
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dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
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@@ -238,6 +268,7 @@ int r420_resume(struct radeon_device *rdev)
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int r420_suspend(struct radeon_device *rdev)
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{
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+ r420_cp_errata_fini(rdev);
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r100_cp_disable(rdev);
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r100_wb_disable(rdev);
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r100_irq_disable(rdev);
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