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@@ -1939,9 +1939,8 @@ static u32 cycle_timer_ticks(u32 cycle_timer)
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* error. (A PCI read should take at least 20 ticks of the 24.576 MHz timer to
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* execute, so we have enough precision to compute the ratio of the differences.)
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*/
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-static u32 ohci_get_cycle_time(struct fw_card *card)
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+static u32 get_cycle_time(struct fw_ohci *ohci)
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{
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- struct fw_ohci *ohci = fw_ohci(card);
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u32 c0, c1, c2;
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u32 t0, t1, t2;
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s32 diff01, diff12;
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@@ -1970,6 +1969,20 @@ static u32 ohci_get_cycle_time(struct fw_card *card)
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return c2;
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}
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+static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
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+{
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+ struct fw_ohci *ohci = fw_ohci(card);
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+
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+ switch (csr_offset) {
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+ case CSR_CYCLE_TIME:
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+ return get_cycle_time(ohci);
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+
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+ default:
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+ WARN_ON(1);
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+ return 0;
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+ }
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+}
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+
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static void copy_iso_headers(struct iso_context *ctx, void *p)
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{
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int i = ctx->header_length;
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@@ -2407,7 +2420,7 @@ static const struct fw_card_driver ohci_driver = {
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.send_response = ohci_send_response,
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.cancel_packet = ohci_cancel_packet,
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.enable_phys_dma = ohci_enable_phys_dma,
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- .get_cycle_time = ohci_get_cycle_time,
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+ .read_csr_reg = ohci_read_csr_reg,
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.allocate_iso_context = ohci_allocate_iso_context,
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.free_iso_context = ohci_free_iso_context,
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