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@@ -690,46 +690,64 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
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return 0;
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}
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-int
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-nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
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- uint32_t vram_h, uint32_t tt_h)
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+static int
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+nvc0_gpuobj_channel_init(struct nouveau_channel *chan, struct nouveau_vm *vm)
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{
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struct drm_device *dev = chan->dev;
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- struct drm_nouveau_private *dev_priv = dev->dev_private;
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- struct nouveau_fpriv *fpriv = nouveau_fpriv(chan->file_priv);
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- struct nouveau_vm *vm = fpriv ? fpriv->vm : dev_priv->chan_vm;
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- struct nouveau_gpuobj *vram = NULL, *tt = NULL;
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+ struct nouveau_gpuobj *pgd = NULL;
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+ struct nouveau_vm_pgd *vpgd;
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int ret, i;
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- NV_DEBUG(dev, "ch%d vram=0x%08x tt=0x%08x\n", chan->id, vram_h, tt_h);
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- if (dev_priv->card_type == NV_C0) {
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- struct nouveau_vm_pgd *vpgd;
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+ ret = nouveau_gpuobj_new(dev, NULL, 4096, 0x1000, 0, &chan->ramin);
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+ if (ret)
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+ return ret;
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- ret = nouveau_gpuobj_new(dev, NULL, 4096, 0x1000, 0,
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- &chan->ramin);
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+ /* create page directory for this vm if none currently exists,
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+ * will be destroyed automagically when last reference to the
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+ * vm is removed
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+ */
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+ if (list_empty(&vm->pgd_list)) {
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+ ret = nouveau_gpuobj_new(dev, NULL, 65536, 0x1000, 0, &pgd);
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if (ret)
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return ret;
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+ }
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+ nouveau_vm_ref(vm, &chan->vm, pgd);
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+ nouveau_gpuobj_ref(NULL, &pgd);
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- nouveau_vm_ref(vm, &chan->vm, NULL);
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+ /* point channel at vm's page directory */
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+ vpgd = list_first_entry(&vm->pgd_list, struct nouveau_vm_pgd, head);
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+ nv_wo32(chan->ramin, 0x0200, lower_32_bits(vpgd->obj->vinst));
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+ nv_wo32(chan->ramin, 0x0204, upper_32_bits(vpgd->obj->vinst));
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+ nv_wo32(chan->ramin, 0x0208, 0xffffffff);
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+ nv_wo32(chan->ramin, 0x020c, 0x000000ff);
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- vpgd = list_first_entry(&vm->pgd_list, struct nouveau_vm_pgd, head);
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- nv_wo32(chan->ramin, 0x0200, lower_32_bits(vpgd->obj->vinst));
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- nv_wo32(chan->ramin, 0x0204, upper_32_bits(vpgd->obj->vinst));
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- nv_wo32(chan->ramin, 0x0208, 0xffffffff);
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- nv_wo32(chan->ramin, 0x020c, 0x000000ff);
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+ /* map display semaphore buffers into channel's vm */
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+ for (i = 0; i < 2; i++) {
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+ struct nv50_display_crtc *dispc = &nv50_display(dev)->crtc[i];
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- for (i = 0; i < 2; i++) {
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- struct nv50_display_crtc *dispc =
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- &nv50_display(dev)->crtc[i];
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+ ret = nouveau_bo_vma_add(dispc->sem.bo, chan->vm,
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+ &chan->dispc_vma[i]);
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+ if (ret)
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+ return ret;
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+ }
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- ret = nouveau_bo_vma_add(dispc->sem.bo, chan->vm,
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- &chan->dispc_vma[i]);
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- if (ret)
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- return ret;
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- }
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+ return 0;
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+}
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- return 0;
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- }
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+int
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+nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
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+ uint32_t vram_h, uint32_t tt_h)
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+{
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+ struct drm_device *dev = chan->dev;
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+ struct drm_nouveau_private *dev_priv = dev->dev_private;
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+ struct nouveau_fpriv *fpriv = nouveau_fpriv(chan->file_priv);
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+ struct nouveau_vm *vm = fpriv ? fpriv->vm : dev_priv->chan_vm;
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+ struct nouveau_gpuobj *vram = NULL, *tt = NULL;
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+ int ret, i;
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+
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+ NV_DEBUG(dev, "ch%d vram=0x%08x tt=0x%08x\n", chan->id, vram_h, tt_h);
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+ if (dev_priv->card_type == NV_C0)
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+ return nvc0_gpuobj_channel_init(chan, vm);
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/* Allocate a chunk of memory for per-channel object storage */
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ret = nouveau_gpuobj_channel_init_pramin(chan);
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