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@@ -43,6 +43,11 @@ module_param(xor_sources, uint, S_IRUGO);
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MODULE_PARM_DESC(xor_sources,
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"Number of xor source buffers (default: 3)");
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+static unsigned int pq_sources = 3;
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+module_param(pq_sources, uint, S_IRUGO);
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+MODULE_PARM_DESC(pq_sources,
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+ "Number of p+q source buffers (default: 3)");
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+
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/*
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* Initialization patterns. All bytes in the source buffer has bit 7
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* set, all bytes in the destination buffer has bit 7 cleared.
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@@ -227,6 +232,7 @@ static int dmatest_func(void *data)
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dma_cookie_t cookie;
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enum dma_status status;
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enum dma_ctrl_flags flags;
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+ u8 pq_coefs[pq_sources];
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int ret;
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int src_cnt;
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int dst_cnt;
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@@ -243,6 +249,11 @@ static int dmatest_func(void *data)
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else if (thread->type == DMA_XOR) {
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src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
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dst_cnt = 1;
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+ } else if (thread->type == DMA_PQ) {
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+ src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
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+ dst_cnt = 2;
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+ for (i = 0; i < pq_sources; i++)
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+ pq_coefs[i] = 1;
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} else
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goto err_srcs;
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@@ -310,6 +321,15 @@ static int dmatest_func(void *data)
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dma_dsts[0] + dst_off,
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dma_srcs, xor_sources,
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len, flags);
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+ else if (thread->type == DMA_PQ) {
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+ dma_addr_t dma_pq[dst_cnt];
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+
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+ for (i = 0; i < dst_cnt; i++)
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+ dma_pq[i] = dma_dsts[i] + dst_off;
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+ tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
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+ pq_sources, pq_coefs,
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+ len, flags);
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+ }
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if (!tx) {
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for (i = 0; i < src_cnt; i++)
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@@ -446,6 +466,8 @@ static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_ty
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op = "copy";
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else if (type == DMA_XOR)
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op = "xor";
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+ else if (type == DMA_PQ)
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+ op = "pq";
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else
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return -EINVAL;
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@@ -501,6 +523,10 @@ static int dmatest_add_channel(struct dma_chan *chan)
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cnt = dmatest_add_threads(dtc, DMA_XOR);
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thread_count += cnt > 0 ?: 0;
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}
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+ if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
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+ cnt = dmatest_add_threads(dtc, DMA_PQ);
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+ thread_count += cnt > 0 ?: 0;
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+ }
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pr_info("dmatest: Started %u threads using %s\n",
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thread_count, dma_chan_name(chan));
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