dmatest.c 16 KB

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  1. /*
  2. * DMA Engine test module
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/dmaengine.h>
  12. #include <linux/init.h>
  13. #include <linux/kthread.h>
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/random.h>
  17. #include <linux/wait.h>
  18. static unsigned int test_buf_size = 16384;
  19. module_param(test_buf_size, uint, S_IRUGO);
  20. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  21. static char test_channel[20];
  22. module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
  23. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  24. static char test_device[20];
  25. module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
  26. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  27. static unsigned int threads_per_chan = 1;
  28. module_param(threads_per_chan, uint, S_IRUGO);
  29. MODULE_PARM_DESC(threads_per_chan,
  30. "Number of threads to start per channel (default: 1)");
  31. static unsigned int max_channels;
  32. module_param(max_channels, uint, S_IRUGO);
  33. MODULE_PARM_DESC(max_channels,
  34. "Maximum number of channels to use (default: all)");
  35. static unsigned int xor_sources = 3;
  36. module_param(xor_sources, uint, S_IRUGO);
  37. MODULE_PARM_DESC(xor_sources,
  38. "Number of xor source buffers (default: 3)");
  39. static unsigned int pq_sources = 3;
  40. module_param(pq_sources, uint, S_IRUGO);
  41. MODULE_PARM_DESC(pq_sources,
  42. "Number of p+q source buffers (default: 3)");
  43. /*
  44. * Initialization patterns. All bytes in the source buffer has bit 7
  45. * set, all bytes in the destination buffer has bit 7 cleared.
  46. *
  47. * Bit 6 is set for all bytes which are to be copied by the DMA
  48. * engine. Bit 5 is set for all bytes which are to be overwritten by
  49. * the DMA engine.
  50. *
  51. * The remaining bits are the inverse of a counter which increments by
  52. * one for each byte address.
  53. */
  54. #define PATTERN_SRC 0x80
  55. #define PATTERN_DST 0x00
  56. #define PATTERN_COPY 0x40
  57. #define PATTERN_OVERWRITE 0x20
  58. #define PATTERN_COUNT_MASK 0x1f
  59. struct dmatest_thread {
  60. struct list_head node;
  61. struct task_struct *task;
  62. struct dma_chan *chan;
  63. u8 **srcs;
  64. u8 **dsts;
  65. enum dma_transaction_type type;
  66. };
  67. struct dmatest_chan {
  68. struct list_head node;
  69. struct dma_chan *chan;
  70. struct list_head threads;
  71. };
  72. /*
  73. * These are protected by dma_list_mutex since they're only used by
  74. * the DMA filter function callback
  75. */
  76. static LIST_HEAD(dmatest_channels);
  77. static unsigned int nr_channels;
  78. static bool dmatest_match_channel(struct dma_chan *chan)
  79. {
  80. if (test_channel[0] == '\0')
  81. return true;
  82. return strcmp(dma_chan_name(chan), test_channel) == 0;
  83. }
  84. static bool dmatest_match_device(struct dma_device *device)
  85. {
  86. if (test_device[0] == '\0')
  87. return true;
  88. return strcmp(dev_name(device->dev), test_device) == 0;
  89. }
  90. static unsigned long dmatest_random(void)
  91. {
  92. unsigned long buf;
  93. get_random_bytes(&buf, sizeof(buf));
  94. return buf;
  95. }
  96. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
  97. {
  98. unsigned int i;
  99. u8 *buf;
  100. for (; (buf = *bufs); bufs++) {
  101. for (i = 0; i < start; i++)
  102. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  103. for ( ; i < start + len; i++)
  104. buf[i] = PATTERN_SRC | PATTERN_COPY
  105. | (~i & PATTERN_COUNT_MASK);;
  106. for ( ; i < test_buf_size; i++)
  107. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  108. buf++;
  109. }
  110. }
  111. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
  112. {
  113. unsigned int i;
  114. u8 *buf;
  115. for (; (buf = *bufs); bufs++) {
  116. for (i = 0; i < start; i++)
  117. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  118. for ( ; i < start + len; i++)
  119. buf[i] = PATTERN_DST | PATTERN_OVERWRITE
  120. | (~i & PATTERN_COUNT_MASK);
  121. for ( ; i < test_buf_size; i++)
  122. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  123. }
  124. }
  125. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  126. unsigned int counter, bool is_srcbuf)
  127. {
  128. u8 diff = actual ^ pattern;
  129. u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
  130. const char *thread_name = current->comm;
  131. if (is_srcbuf)
  132. pr_warning("%s: srcbuf[0x%x] overwritten!"
  133. " Expected %02x, got %02x\n",
  134. thread_name, index, expected, actual);
  135. else if ((pattern & PATTERN_COPY)
  136. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  137. pr_warning("%s: dstbuf[0x%x] not copied!"
  138. " Expected %02x, got %02x\n",
  139. thread_name, index, expected, actual);
  140. else if (diff & PATTERN_SRC)
  141. pr_warning("%s: dstbuf[0x%x] was copied!"
  142. " Expected %02x, got %02x\n",
  143. thread_name, index, expected, actual);
  144. else
  145. pr_warning("%s: dstbuf[0x%x] mismatch!"
  146. " Expected %02x, got %02x\n",
  147. thread_name, index, expected, actual);
  148. }
  149. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  150. unsigned int end, unsigned int counter, u8 pattern,
  151. bool is_srcbuf)
  152. {
  153. unsigned int i;
  154. unsigned int error_count = 0;
  155. u8 actual;
  156. u8 expected;
  157. u8 *buf;
  158. unsigned int counter_orig = counter;
  159. for (; (buf = *bufs); bufs++) {
  160. counter = counter_orig;
  161. for (i = start; i < end; i++) {
  162. actual = buf[i];
  163. expected = pattern | (~counter & PATTERN_COUNT_MASK);
  164. if (actual != expected) {
  165. if (error_count < 32)
  166. dmatest_mismatch(actual, pattern, i,
  167. counter, is_srcbuf);
  168. error_count++;
  169. }
  170. counter++;
  171. }
  172. }
  173. if (error_count > 32)
  174. pr_warning("%s: %u errors suppressed\n",
  175. current->comm, error_count - 32);
  176. return error_count;
  177. }
  178. static void dmatest_callback(void *completion)
  179. {
  180. complete(completion);
  181. }
  182. /*
  183. * This function repeatedly tests DMA transfers of various lengths and
  184. * offsets for a given operation type until it is told to exit by
  185. * kthread_stop(). There may be multiple threads running this function
  186. * in parallel for a single channel, and there may be multiple channels
  187. * being tested in parallel.
  188. *
  189. * Before each test, the source and destination buffer is initialized
  190. * with a known pattern. This pattern is different depending on
  191. * whether it's in an area which is supposed to be copied or
  192. * overwritten, and different in the source and destination buffers.
  193. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  194. * we'll notice.
  195. */
  196. static int dmatest_func(void *data)
  197. {
  198. struct dmatest_thread *thread = data;
  199. struct dma_chan *chan;
  200. const char *thread_name;
  201. unsigned int src_off, dst_off, len;
  202. unsigned int error_count;
  203. unsigned int failed_tests = 0;
  204. unsigned int total_tests = 0;
  205. dma_cookie_t cookie;
  206. enum dma_status status;
  207. enum dma_ctrl_flags flags;
  208. u8 pq_coefs[pq_sources];
  209. int ret;
  210. int src_cnt;
  211. int dst_cnt;
  212. int i;
  213. thread_name = current->comm;
  214. ret = -ENOMEM;
  215. smp_rmb();
  216. chan = thread->chan;
  217. if (thread->type == DMA_MEMCPY)
  218. src_cnt = dst_cnt = 1;
  219. else if (thread->type == DMA_XOR) {
  220. src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
  221. dst_cnt = 1;
  222. } else if (thread->type == DMA_PQ) {
  223. src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
  224. dst_cnt = 2;
  225. for (i = 0; i < pq_sources; i++)
  226. pq_coefs[i] = 1;
  227. } else
  228. goto err_srcs;
  229. thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
  230. if (!thread->srcs)
  231. goto err_srcs;
  232. for (i = 0; i < src_cnt; i++) {
  233. thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
  234. if (!thread->srcs[i])
  235. goto err_srcbuf;
  236. }
  237. thread->srcs[i] = NULL;
  238. thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
  239. if (!thread->dsts)
  240. goto err_dsts;
  241. for (i = 0; i < dst_cnt; i++) {
  242. thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
  243. if (!thread->dsts[i])
  244. goto err_dstbuf;
  245. }
  246. thread->dsts[i] = NULL;
  247. set_user_nice(current, 10);
  248. flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
  249. while (!kthread_should_stop()) {
  250. struct dma_device *dev = chan->device;
  251. struct dma_async_tx_descriptor *tx = NULL;
  252. dma_addr_t dma_srcs[src_cnt];
  253. dma_addr_t dma_dsts[dst_cnt];
  254. struct completion cmp;
  255. unsigned long tmo = msecs_to_jiffies(3000);
  256. total_tests++;
  257. len = dmatest_random() % test_buf_size + 1;
  258. src_off = dmatest_random() % (test_buf_size - len + 1);
  259. dst_off = dmatest_random() % (test_buf_size - len + 1);
  260. dmatest_init_srcs(thread->srcs, src_off, len);
  261. dmatest_init_dsts(thread->dsts, dst_off, len);
  262. for (i = 0; i < src_cnt; i++) {
  263. u8 *buf = thread->srcs[i] + src_off;
  264. dma_srcs[i] = dma_map_single(dev->dev, buf, len,
  265. DMA_TO_DEVICE);
  266. }
  267. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  268. for (i = 0; i < dst_cnt; i++) {
  269. dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
  270. test_buf_size,
  271. DMA_BIDIRECTIONAL);
  272. }
  273. if (thread->type == DMA_MEMCPY)
  274. tx = dev->device_prep_dma_memcpy(chan,
  275. dma_dsts[0] + dst_off,
  276. dma_srcs[0], len,
  277. flags);
  278. else if (thread->type == DMA_XOR)
  279. tx = dev->device_prep_dma_xor(chan,
  280. dma_dsts[0] + dst_off,
  281. dma_srcs, xor_sources,
  282. len, flags);
  283. else if (thread->type == DMA_PQ) {
  284. dma_addr_t dma_pq[dst_cnt];
  285. for (i = 0; i < dst_cnt; i++)
  286. dma_pq[i] = dma_dsts[i] + dst_off;
  287. tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
  288. pq_sources, pq_coefs,
  289. len, flags);
  290. }
  291. if (!tx) {
  292. for (i = 0; i < src_cnt; i++)
  293. dma_unmap_single(dev->dev, dma_srcs[i], len,
  294. DMA_TO_DEVICE);
  295. for (i = 0; i < dst_cnt; i++)
  296. dma_unmap_single(dev->dev, dma_dsts[i],
  297. test_buf_size,
  298. DMA_BIDIRECTIONAL);
  299. pr_warning("%s: #%u: prep error with src_off=0x%x "
  300. "dst_off=0x%x len=0x%x\n",
  301. thread_name, total_tests - 1,
  302. src_off, dst_off, len);
  303. msleep(100);
  304. failed_tests++;
  305. continue;
  306. }
  307. init_completion(&cmp);
  308. tx->callback = dmatest_callback;
  309. tx->callback_param = &cmp;
  310. cookie = tx->tx_submit(tx);
  311. if (dma_submit_error(cookie)) {
  312. pr_warning("%s: #%u: submit error %d with src_off=0x%x "
  313. "dst_off=0x%x len=0x%x\n",
  314. thread_name, total_tests - 1, cookie,
  315. src_off, dst_off, len);
  316. msleep(100);
  317. failed_tests++;
  318. continue;
  319. }
  320. dma_async_issue_pending(chan);
  321. tmo = wait_for_completion_timeout(&cmp, tmo);
  322. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  323. if (tmo == 0) {
  324. pr_warning("%s: #%u: test timed out\n",
  325. thread_name, total_tests - 1);
  326. failed_tests++;
  327. continue;
  328. } else if (status != DMA_SUCCESS) {
  329. pr_warning("%s: #%u: got completion callback,"
  330. " but status is \'%s\'\n",
  331. thread_name, total_tests - 1,
  332. status == DMA_ERROR ? "error" : "in progress");
  333. failed_tests++;
  334. continue;
  335. }
  336. /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
  337. for (i = 0; i < dst_cnt; i++)
  338. dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
  339. DMA_BIDIRECTIONAL);
  340. error_count = 0;
  341. pr_debug("%s: verifying source buffer...\n", thread_name);
  342. error_count += dmatest_verify(thread->srcs, 0, src_off,
  343. 0, PATTERN_SRC, true);
  344. error_count += dmatest_verify(thread->srcs, src_off,
  345. src_off + len, src_off,
  346. PATTERN_SRC | PATTERN_COPY, true);
  347. error_count += dmatest_verify(thread->srcs, src_off + len,
  348. test_buf_size, src_off + len,
  349. PATTERN_SRC, true);
  350. pr_debug("%s: verifying dest buffer...\n",
  351. thread->task->comm);
  352. error_count += dmatest_verify(thread->dsts, 0, dst_off,
  353. 0, PATTERN_DST, false);
  354. error_count += dmatest_verify(thread->dsts, dst_off,
  355. dst_off + len, src_off,
  356. PATTERN_SRC | PATTERN_COPY, false);
  357. error_count += dmatest_verify(thread->dsts, dst_off + len,
  358. test_buf_size, dst_off + len,
  359. PATTERN_DST, false);
  360. if (error_count) {
  361. pr_warning("%s: #%u: %u errors with "
  362. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  363. thread_name, total_tests - 1, error_count,
  364. src_off, dst_off, len);
  365. failed_tests++;
  366. } else {
  367. pr_debug("%s: #%u: No errors with "
  368. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  369. thread_name, total_tests - 1,
  370. src_off, dst_off, len);
  371. }
  372. }
  373. ret = 0;
  374. for (i = 0; thread->dsts[i]; i++)
  375. kfree(thread->dsts[i]);
  376. err_dstbuf:
  377. kfree(thread->dsts);
  378. err_dsts:
  379. for (i = 0; thread->srcs[i]; i++)
  380. kfree(thread->srcs[i]);
  381. err_srcbuf:
  382. kfree(thread->srcs);
  383. err_srcs:
  384. pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
  385. thread_name, total_tests, failed_tests, ret);
  386. return ret;
  387. }
  388. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  389. {
  390. struct dmatest_thread *thread;
  391. struct dmatest_thread *_thread;
  392. int ret;
  393. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  394. ret = kthread_stop(thread->task);
  395. pr_debug("dmatest: thread %s exited with status %d\n",
  396. thread->task->comm, ret);
  397. list_del(&thread->node);
  398. kfree(thread);
  399. }
  400. kfree(dtc);
  401. }
  402. static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
  403. {
  404. struct dmatest_thread *thread;
  405. struct dma_chan *chan = dtc->chan;
  406. char *op;
  407. unsigned int i;
  408. if (type == DMA_MEMCPY)
  409. op = "copy";
  410. else if (type == DMA_XOR)
  411. op = "xor";
  412. else if (type == DMA_PQ)
  413. op = "pq";
  414. else
  415. return -EINVAL;
  416. for (i = 0; i < threads_per_chan; i++) {
  417. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  418. if (!thread) {
  419. pr_warning("dmatest: No memory for %s-%s%u\n",
  420. dma_chan_name(chan), op, i);
  421. break;
  422. }
  423. thread->chan = dtc->chan;
  424. thread->type = type;
  425. smp_wmb();
  426. thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
  427. dma_chan_name(chan), op, i);
  428. if (IS_ERR(thread->task)) {
  429. pr_warning("dmatest: Failed to run thread %s-%s%u\n",
  430. dma_chan_name(chan), op, i);
  431. kfree(thread);
  432. break;
  433. }
  434. /* srcbuf and dstbuf are allocated by the thread itself */
  435. list_add_tail(&thread->node, &dtc->threads);
  436. }
  437. return i;
  438. }
  439. static int dmatest_add_channel(struct dma_chan *chan)
  440. {
  441. struct dmatest_chan *dtc;
  442. struct dma_device *dma_dev = chan->device;
  443. unsigned int thread_count = 0;
  444. unsigned int cnt;
  445. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  446. if (!dtc) {
  447. pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
  448. return -ENOMEM;
  449. }
  450. dtc->chan = chan;
  451. INIT_LIST_HEAD(&dtc->threads);
  452. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  453. cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
  454. thread_count += cnt > 0 ?: 0;
  455. }
  456. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  457. cnt = dmatest_add_threads(dtc, DMA_XOR);
  458. thread_count += cnt > 0 ?: 0;
  459. }
  460. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  461. cnt = dmatest_add_threads(dtc, DMA_PQ);
  462. thread_count += cnt > 0 ?: 0;
  463. }
  464. pr_info("dmatest: Started %u threads using %s\n",
  465. thread_count, dma_chan_name(chan));
  466. list_add_tail(&dtc->node, &dmatest_channels);
  467. nr_channels++;
  468. return 0;
  469. }
  470. static bool filter(struct dma_chan *chan, void *param)
  471. {
  472. if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
  473. return false;
  474. else
  475. return true;
  476. }
  477. static int __init dmatest_init(void)
  478. {
  479. dma_cap_mask_t mask;
  480. struct dma_chan *chan;
  481. int err = 0;
  482. dma_cap_zero(mask);
  483. dma_cap_set(DMA_MEMCPY, mask);
  484. for (;;) {
  485. chan = dma_request_channel(mask, filter, NULL);
  486. if (chan) {
  487. err = dmatest_add_channel(chan);
  488. if (err == 0)
  489. continue;
  490. else {
  491. dma_release_channel(chan);
  492. break; /* add_channel failed, punt */
  493. }
  494. } else
  495. break; /* no more channels available */
  496. if (max_channels && nr_channels >= max_channels)
  497. break; /* we have all we need */
  498. }
  499. return err;
  500. }
  501. /* when compiled-in wait for drivers to load first */
  502. late_initcall(dmatest_init);
  503. static void __exit dmatest_exit(void)
  504. {
  505. struct dmatest_chan *dtc, *_dtc;
  506. struct dma_chan *chan;
  507. list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
  508. list_del(&dtc->node);
  509. chan = dtc->chan;
  510. dmatest_cleanup_channel(dtc);
  511. pr_debug("dmatest: dropped channel %s\n",
  512. dma_chan_name(chan));
  513. dma_release_channel(chan);
  514. }
  515. }
  516. module_exit(dmatest_exit);
  517. MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
  518. MODULE_LICENSE("GPL v2");