Browse Source

[ARM] armv7: add dedicated ARMv7 barrier instructions

Starting with ARMv7, there are dedicated instruction for the ISB, DSB
and DMB barriers and there is no need to execute them as CP15
operations.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Catalin Marinas 18 years ago
parent
commit
56163fcf19
1 changed files with 5 additions and 1 deletions
  1. 5 1
      include/asm-arm/system.h

+ 5 - 1
include/asm-arm/system.h

@@ -158,7 +158,11 @@ extern unsigned int user_debug;
 #define vectors_high()	(0)
 #endif
 
-#if defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ >= 6
+#if __LINUX_ARM_ARCH__ >= 7
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
 #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
 				    : : "r" (0) : "memory")
 #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \