|
@@ -38,14 +38,20 @@
|
|
#define DA8XX_EMAC_MDIO_BASE 0x01e24000
|
|
#define DA8XX_EMAC_MDIO_BASE 0x01e24000
|
|
#define DA8XX_GPIO_BASE 0x01e26000
|
|
#define DA8XX_GPIO_BASE 0x01e26000
|
|
#define DA8XX_I2C1_BASE 0x01e28000
|
|
#define DA8XX_I2C1_BASE 0x01e28000
|
|
|
|
+#define DA8XX_SPI0_BASE 0x01c41000
|
|
|
|
+#define DA8XX_SPI1_BASE 0x01f0e000
|
|
|
|
|
|
#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
|
|
#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
|
|
#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
|
|
#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
|
|
#define DA8XX_EMAC_RAM_OFFSET 0x0000
|
|
#define DA8XX_EMAC_RAM_OFFSET 0x0000
|
|
#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
|
|
#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
|
|
|
|
|
|
|
|
+#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
|
|
|
|
+#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
|
|
#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
|
|
#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
|
|
#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
|
|
#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
|
|
|
|
+#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
|
|
|
|
+#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
|
|
#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
|
|
#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
|
|
#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
|
|
#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
|
|
|
|
|
|
@@ -723,3 +729,101 @@ int __init da8xx_register_cpuidle(void)
|
|
|
|
|
|
return platform_device_register(&da8xx_cpuidle_device);
|
|
return platform_device_register(&da8xx_cpuidle_device);
|
|
}
|
|
}
|
|
|
|
+
|
|
|
|
+static struct resource da8xx_spi0_resources[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .start = DA8XX_SPI0_BASE,
|
|
|
|
+ .end = DA8XX_SPI0_BASE + SZ_4K - 1,
|
|
|
|
+ .flags = IORESOURCE_MEM,
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .start = IRQ_DA8XX_SPINT0,
|
|
|
|
+ .end = IRQ_DA8XX_SPINT0,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+ [2] = {
|
|
|
|
+ .start = DA8XX_DMA_SPI0_RX,
|
|
|
|
+ .end = DA8XX_DMA_SPI0_RX,
|
|
|
|
+ .flags = IORESOURCE_DMA,
|
|
|
|
+ },
|
|
|
|
+ [3] = {
|
|
|
|
+ .start = DA8XX_DMA_SPI0_TX,
|
|
|
|
+ .end = DA8XX_DMA_SPI0_TX,
|
|
|
|
+ .flags = IORESOURCE_DMA,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct resource da8xx_spi1_resources[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .start = DA8XX_SPI1_BASE,
|
|
|
|
+ .end = DA8XX_SPI1_BASE + SZ_4K - 1,
|
|
|
|
+ .flags = IORESOURCE_MEM,
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .start = IRQ_DA8XX_SPINT1,
|
|
|
|
+ .end = IRQ_DA8XX_SPINT1,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+ [2] = {
|
|
|
|
+ .start = DA8XX_DMA_SPI1_RX,
|
|
|
|
+ .end = DA8XX_DMA_SPI1_RX,
|
|
|
|
+ .flags = IORESOURCE_DMA,
|
|
|
|
+ },
|
|
|
|
+ [3] = {
|
|
|
|
+ .start = DA8XX_DMA_SPI1_TX,
|
|
|
|
+ .end = DA8XX_DMA_SPI1_TX,
|
|
|
|
+ .flags = IORESOURCE_DMA,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct davinci_spi_platform_data da8xx_spi_pdata[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .version = SPI_VERSION_2,
|
|
|
|
+ .intr_line = 1,
|
|
|
|
+ .dma_event_q = EVENTQ_0,
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .version = SPI_VERSION_2,
|
|
|
|
+ .intr_line = 1,
|
|
|
|
+ .dma_event_q = EVENTQ_0,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_device da8xx_spi_device[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .name = "spi_davinci",
|
|
|
|
+ .id = 0,
|
|
|
|
+ .num_resources = ARRAY_SIZE(da8xx_spi0_resources),
|
|
|
|
+ .resource = da8xx_spi0_resources,
|
|
|
|
+ .dev = {
|
|
|
|
+ .platform_data = &da8xx_spi_pdata[0],
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .name = "spi_davinci",
|
|
|
|
+ .id = 1,
|
|
|
|
+ .num_resources = ARRAY_SIZE(da8xx_spi1_resources),
|
|
|
|
+ .resource = da8xx_spi1_resources,
|
|
|
|
+ .dev = {
|
|
|
|
+ .platform_data = &da8xx_spi_pdata[1],
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+int __init da8xx_register_spi(int instance, struct spi_board_info *info,
|
|
|
|
+ unsigned len)
|
|
|
|
+{
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ if (instance < 0 || instance > 1)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+
|
|
|
|
+ ret = spi_register_board_info(info, len);
|
|
|
|
+ if (ret)
|
|
|
|
+ pr_warning("%s: failed to register board info for spi %d :"
|
|
|
|
+ " %d\n", __func__, instance, ret);
|
|
|
|
+
|
|
|
|
+ da8xx_spi_pdata[instance].num_chipselect = len;
|
|
|
|
+
|
|
|
|
+ return platform_device_register(&da8xx_spi_device[instance]);
|
|
|
|
+}
|