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@@ -336,13 +336,13 @@ jme_linkstat_from_phy(struct jme_adapter *jme)
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}
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static inline void
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-jme_set_phyfifoa(struct jme_adapter *jme)
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+jme_set_phyfifo_5level(struct jme_adapter *jme)
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{
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jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
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}
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static inline void
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-jme_set_phyfifob(struct jme_adapter *jme)
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+jme_set_phyfifo_8level(struct jme_adapter *jme)
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{
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jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
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}
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@@ -457,15 +457,15 @@ jme_check_link(struct net_device *netdev, int testonly)
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gpreg1 |= GPREG1_HALFMODEPATCH;
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switch (phylink & PHY_LINK_SPEED_MASK) {
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case PHY_LINK_SPEED_10M:
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- jme_set_phyfifoa(jme);
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+ jme_set_phyfifo_8level(jme);
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gpreg1 |= GPREG1_RSSPATCH;
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break;
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case PHY_LINK_SPEED_100M:
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- jme_set_phyfifob(jme);
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+ jme_set_phyfifo_5level(jme);
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gpreg1 |= GPREG1_RSSPATCH;
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break;
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case PHY_LINK_SPEED_1000M:
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- jme_set_phyfifoa(jme);
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+ jme_set_phyfifo_8level(jme);
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break;
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default:
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break;
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@@ -2979,7 +2979,7 @@ jme_init_one(struct pci_dev *pdev,
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jme->mii_if.mdio_write = jme_mdio_write;
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jme_clear_pm(jme);
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- jme_set_phyfifoa(jme);
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+ jme_set_phyfifo_5level(jme);
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pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
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if (!jme->fpgaver)
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jme_phy_init(jme);
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