|
@@ -358,14 +358,10 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
|
|
|
|
|
|
static void u8_duplex(struct driver_data *drv_data)
|
|
|
{
|
|
|
- /* poll for SPI completion before start */
|
|
|
- while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
|
|
|
- cpu_relax();
|
|
|
-
|
|
|
/* in duplex mode, clk is triggered by writing of TDBR */
|
|
|
while (drv_data->rx < drv_data->rx_end) {
|
|
|
write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
|
|
|
- while (read_STAT(drv_data) & BIT_STAT_TXS)
|
|
|
+ while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
|
|
|
cpu_relax();
|
|
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
|
|
cpu_relax();
|
|
@@ -495,14 +491,10 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
|
|
|
|
|
|
static void u16_duplex(struct driver_data *drv_data)
|
|
|
{
|
|
|
- /* poll for SPI completion before start */
|
|
|
- while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
|
|
|
- cpu_relax();
|
|
|
-
|
|
|
/* in duplex mode, clk is triggered by writing of TDBR */
|
|
|
while (drv_data->tx < drv_data->tx_end) {
|
|
|
write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
|
|
|
- while (read_STAT(drv_data) & BIT_STAT_TXS)
|
|
|
+ while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
|
|
|
cpu_relax();
|
|
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
|
|
cpu_relax();
|
|
@@ -516,15 +508,11 @@ static void u16_cs_chg_duplex(struct driver_data *drv_data)
|
|
|
{
|
|
|
struct chip_data *chip = drv_data->cur_chip;
|
|
|
|
|
|
- /* poll for SPI completion before start */
|
|
|
- while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
|
|
|
- cpu_relax();
|
|
|
-
|
|
|
while (drv_data->tx < drv_data->tx_end) {
|
|
|
cs_active(drv_data, chip);
|
|
|
|
|
|
write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
|
|
|
- while (read_STAT(drv_data) & BIT_STAT_TXS)
|
|
|
+ while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
|
|
|
cpu_relax();
|
|
|
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
|
|
|
cpu_relax();
|