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@@ -10309,7 +10309,7 @@ static void intel_init_display(struct drm_device *dev)
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dev_priv->display.write_eld = ironlake_write_eld;
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dev_priv->display.modeset_global_resources =
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ivb_modeset_global_resources;
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- } else if (IS_HASWELL(dev)) {
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+ } else if (IS_HASWELL(dev) || IS_GEN8(dev)) {
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dev_priv->display.fdi_link_train = hsw_fdi_link_train;
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dev_priv->display.write_eld = haswell_write_eld;
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dev_priv->display.modeset_global_resources =
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@@ -10340,6 +10340,7 @@ static void intel_init_display(struct drm_device *dev)
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dev_priv->display.queue_flip = intel_gen6_queue_flip;
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break;
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case 7:
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+ case 8: /* FIXME(BDW): Check that the gen8 RCS flip works. */
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dev_priv->display.queue_flip = intel_gen7_queue_flip;
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break;
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}
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