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-/*
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- * tps65910-irq.c -- TI TPS6591x
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- *
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- * Copyright 2010 Texas Instruments Inc.
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- *
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- * Author: Graeme Gregory <gg@slimlogic.co.uk>
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- * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License as published by the
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- * Free Software Foundation; either version 2 of the License, or (at your
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- * option) any later version.
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- *
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- */
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-
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-#include <linux/kernel.h>
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-#include <linux/module.h>
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-#include <linux/init.h>
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-#include <linux/bug.h>
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-#include <linux/device.h>
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-#include <linux/interrupt.h>
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-#include <linux/irq.h>
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-#include <linux/irqdomain.h>
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-#include <linux/gpio.h>
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-#include <linux/mfd/tps65910.h>
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-
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-
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-static const struct regmap_irq tps65911_irqs[] = {
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- /* INT_STS */
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- [TPS65911_IRQ_PWRHOLD_F] = {
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- .mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_VBAT_VMHI] = {
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- .mask = INT_MSK_VMBHI_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_PWRON] = {
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- .mask = INT_MSK_PWRON_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_PWRON_LP] = {
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- .mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_PWRHOLD_R] = {
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- .mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_HOTDIE] = {
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- .mask = INT_MSK_HOTDIE_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_RTC_ALARM] = {
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- .mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65911_IRQ_RTC_PERIOD] = {
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- .mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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-
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- /* INT_STS2 */
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- [TPS65911_IRQ_GPIO0_R] = {
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- .mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO0_F] = {
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- .mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO1_R] = {
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- .mask = INT_MSK2_GPIO1_R_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO1_F] = {
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- .mask = INT_MSK2_GPIO1_F_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO2_R] = {
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- .mask = INT_MSK2_GPIO2_R_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO2_F] = {
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- .mask = INT_MSK2_GPIO2_F_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO3_R] = {
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- .mask = INT_MSK2_GPIO3_R_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65911_IRQ_GPIO3_F] = {
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- .mask = INT_MSK2_GPIO3_F_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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-
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- /* INT_STS3 */
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- [TPS65911_IRQ_GPIO4_R] = {
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- .mask = INT_MSK3_GPIO4_R_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_GPIO4_F] = {
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- .mask = INT_MSK3_GPIO4_F_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_GPIO5_R] = {
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- .mask = INT_MSK3_GPIO5_R_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_GPIO5_F] = {
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- .mask = INT_MSK3_GPIO5_F_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_WTCHDG] = {
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- .mask = INT_MSK3_WTCHDG_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_VMBCH2_H] = {
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- .mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_VMBCH2_L] = {
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- .mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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- [TPS65911_IRQ_PWRDN] = {
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- .mask = INT_MSK3_PWRDN_IT_MSK_MASK,
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- .reg_offset = 2,
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- },
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-};
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-
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-static const struct regmap_irq tps65910_irqs[] = {
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- /* INT_STS */
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- [TPS65910_IRQ_VBAT_VMBDCH] = {
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- .mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_VBAT_VMHI] = {
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- .mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_PWRON] = {
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- .mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_PWRON_LP] = {
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- .mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_PWRHOLD] = {
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- .mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_HOTDIE] = {
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- .mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_RTC_ALARM] = {
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- .mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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- [TPS65910_IRQ_RTC_PERIOD] = {
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- .mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK,
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- .reg_offset = 0,
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- },
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-
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- /* INT_STS2 */
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- [TPS65910_IRQ_GPIO_R] = {
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- .mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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- [TPS65910_IRQ_GPIO_F] = {
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- .mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK,
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- .reg_offset = 1,
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- },
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-};
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-
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-static struct regmap_irq_chip tps65911_irq_chip = {
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- .name = "tps65910",
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- .irqs = tps65911_irqs,
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- .num_irqs = ARRAY_SIZE(tps65911_irqs),
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- .num_regs = 3,
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- .irq_reg_stride = 2,
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- .status_base = TPS65910_INT_STS,
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- .mask_base = TPS65910_INT_MSK,
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- .ack_base = TPS65910_INT_MSK,
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-};
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-
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-static struct regmap_irq_chip tps65910_irq_chip = {
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- .name = "tps65910",
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- .irqs = tps65910_irqs,
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- .num_irqs = ARRAY_SIZE(tps65910_irqs),
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- .num_regs = 2,
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- .irq_reg_stride = 2,
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- .status_base = TPS65910_INT_STS,
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- .mask_base = TPS65910_INT_MSK,
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- .ack_base = TPS65910_INT_MSK,
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-};
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-
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-int tps65910_irq_init(struct tps65910 *tps65910, int irq,
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- struct tps65910_platform_data *pdata)
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-{
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- int ret = 0;
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- static struct regmap_irq_chip *tps6591x_irqs_chip;
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-
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- if (!irq) {
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- dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
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- return -EINVAL;
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- }
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-
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- if (!pdata) {
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- dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
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- return -EINVAL;
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- }
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-
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-
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- switch (tps65910_chip_id(tps65910)) {
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- case TPS65910:
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- tps6591x_irqs_chip = &tps65910_irq_chip;
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- break;
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- case TPS65911:
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- tps6591x_irqs_chip = &tps65911_irq_chip;
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- break;
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- }
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-
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- tps65910->chip_irq = irq;
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- ret = regmap_add_irq_chip(tps65910->regmap, tps65910->chip_irq,
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- IRQF_ONESHOT, pdata->irq_base,
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- tps6591x_irqs_chip, &tps65910->irq_data);
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- if (ret < 0) {
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- dev_warn(tps65910->dev,
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- "Failed to add irq_chip %d\n", ret);
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- return ret;
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- }
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- return ret;
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-}
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-
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-int tps65910_irq_exit(struct tps65910 *tps65910)
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-{
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- if (tps65910->chip_irq > 0)
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- regmap_del_irq_chip(tps65910->chip_irq, tps65910->irq_data);
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- return 0;
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-}
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