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@@ -40,6 +40,7 @@
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#include <asm/spitfire.h>
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#include <asm/sections.h>
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#include <asm/tsb.h>
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+#include <asm/hypervisor.h>
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extern void device_scan(void);
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@@ -1083,6 +1084,24 @@ static void __init tsb_phys_patch(void)
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}
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}
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+/* Register this cpu's fault status area with the hypervisor. */
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+void __cpuinit sun4v_register_fault_status(void)
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+{
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+ register unsigned long arg0 asm("%o0");
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+ register unsigned long arg1 asm("%o1");
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+ int cpu = hard_smp_processor_id();
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+ struct trap_per_cpu *tb = &trap_block[cpu];
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+ unsigned long pa;
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+
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+ pa = kern_base + ((unsigned long) tb - KERNBASE);
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+ arg0 = HV_FAST_MMU_FAULT_AREA_CONF;
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+ arg1 = pa;
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+ __asm__ __volatile__("ta %4"
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+ : "=&r" (arg0), "=&r" (arg1)
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+ : "0" (arg0), "1" (arg1),
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+ "i" (HV_FAST_TRAP));
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+}
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+
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/* paging_init() sets up the page tables */
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extern void cheetah_ecache_flush_init(void);
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@@ -1096,12 +1115,17 @@ void __init paging_init(void)
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unsigned long end_pfn, pages_avail, shift;
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unsigned long real_end, i;
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+ kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
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+ kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
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+
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if (tlb_type == cheetah_plus ||
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tlb_type == hypervisor)
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tsb_phys_patch();
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- if (tlb_type == hypervisor)
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+ if (tlb_type == hypervisor) {
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sun4v_patch_tlb_handlers();
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+ sun4v_register_fault_status();
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+ }
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/* Find available physical memory... */
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read_obp_memory("available", &pavail[0], &pavail_ents);
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@@ -1112,9 +1136,6 @@ void __init paging_init(void)
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pfn_base = phys_base >> PAGE_SHIFT;
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- kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
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- kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
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-
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set_bit(0, mmu_context_bmap);
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shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
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