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@@ -3909,11 +3909,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
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udelay(150);
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}
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- if (HAS_PCH_SPLIT(dev)) {
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- pipeconf &= ~PIPECONF_DITHER_EN;
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- pipeconf &= ~PIPECONF_DITHER_TYPE_MASK;
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- }
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-
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/* The LVDS pin pair needs to be on before the DPLLs are enabled.
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* This is an exception to the general rule that mode_set doesn't turn
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* things on.
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@@ -3951,23 +3946,27 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
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* appropriately here, but we need to look more thoroughly into how
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* panels behave in the two modes.
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*/
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- /* set the dithering flag */
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- if (IS_I965G(dev)) {
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- if (dev_priv->lvds_dither) {
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- if (HAS_PCH_SPLIT(dev)) {
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- pipeconf |= PIPECONF_DITHER_EN;
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- pipeconf |= PIPECONF_DITHER_TYPE_ST1;
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- } else
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- lvds |= LVDS_ENABLE_DITHER;
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- } else {
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- if (!HAS_PCH_SPLIT(dev)) {
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- lvds &= ~LVDS_ENABLE_DITHER;
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- }
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- }
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+ /* set the dithering flag on non-PCH LVDS as needed */
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+ if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
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+ if (dev_priv->lvds_dither)
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+ lvds |= LVDS_ENABLE_DITHER;
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+ else
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+ lvds &= ~LVDS_ENABLE_DITHER;
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}
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I915_WRITE(lvds_reg, lvds);
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I915_READ(lvds_reg);
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}
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+
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+ /* set the dithering flag and clear for anything other than a panel. */
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+ if (HAS_PCH_SPLIT(dev)) {
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+ pipeconf &= ~PIPECONF_DITHER_EN;
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+ pipeconf &= ~PIPECONF_DITHER_TYPE_MASK;
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+ if (dev_priv->lvds_dither && (is_lvds || has_edp_encoder)) {
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+ pipeconf |= PIPECONF_DITHER_EN;
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+ pipeconf |= PIPECONF_DITHER_TYPE_ST1;
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+ }
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+ }
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+
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if (is_dp)
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intel_dp_set_m_n(crtc, mode, adjusted_mode);
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else if (HAS_PCH_SPLIT(dev)) {
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