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@@ -559,7 +559,7 @@ void dss_set_dac_pwrdn_bgz(bool enable)
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REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */
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}
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-static int dss_init(bool skip_init)
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+static int dss_init(void)
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{
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int r;
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u32 rev;
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@@ -578,22 +578,20 @@ static int dss_init(bool skip_init)
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goto fail0;
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}
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- if (!skip_init) {
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- /* disable LCD and DIGIT output. This seems to fix the synclost
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- * problem that we get, if the bootloader starts the DSS and
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- * the kernel resets it */
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- omap_writel(omap_readl(0x48050440) & ~0x3, 0x48050440);
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-
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- /* We need to wait here a bit, otherwise we sometimes start to
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- * get synclost errors, and after that only power cycle will
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- * restore DSS functionality. I have no idea why this happens.
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- * And we have to wait _before_ resetting the DSS, but after
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- * enabling clocks.
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- */
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- msleep(50);
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-
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- _omap_dss_reset();
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- }
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+ /* disable LCD and DIGIT output. This seems to fix the synclost
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+ * problem that we get, if the bootloader starts the DSS and
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+ * the kernel resets it */
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+ omap_writel(omap_readl(0x48050440) & ~0x3, 0x48050440);
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+
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+ /* We need to wait here a bit, otherwise we sometimes start to
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+ * get synclost errors, and after that only power cycle will
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+ * restore DSS functionality. I have no idea why this happens.
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+ * And we have to wait _before_ resetting the DSS, but after
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+ * enabling clocks.
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+ */
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+ msleep(50);
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+
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+ _omap_dss_reset();
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/* autoidle */
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REG_FLD_MOD(DSS_SYSCONFIG, 1, 0, 0);
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@@ -954,7 +952,6 @@ void dss_debug_dump_clocks(struct seq_file *s)
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static int omap_dsshw_probe(struct platform_device *pdev)
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{
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int r;
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- int skip_init = 0;
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dss.pdev = pdev;
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@@ -967,13 +964,7 @@ static int omap_dsshw_probe(struct platform_device *pdev)
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dss.ctx_id = dss_get_ctx_id();
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DSSDBG("initial ctx id %u\n", dss.ctx_id);
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-#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
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- /* DISPC_CONTROL */
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- if (omap_readl(0x48050440) & 1) /* LCD enabled? */
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- skip_init = 1;
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-#endif
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-
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- r = dss_init(skip_init);
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+ r = dss_init();
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if (r) {
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DSSERR("Failed to initialize DSS\n");
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goto err_dss;
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