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@@ -18,14 +18,52 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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+#include <linux/mfd/tmio.h>
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+#include <linux/mmc/host.h>
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+#include <linux/mtd/partitions.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_device.h>
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+#include <linux/regulator/fixed.h>
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+#include <linux/regulator/machine.h>
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#include <linux/smsc911x.h>
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+#include <linux/spi/spi.h>
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+#include <linux/spi/flash.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/r8a7778.h>
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#include <asm/mach/arch.h>
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+/*
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+ * CN9(Upper side) SCIF/RCAN selection
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+ *
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+ * 1,4 3,6
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+ * SW40 SCIF RCAN
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+ * SW41 SCIF RCAN
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+ */
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+
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+/*
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+ * MMC (CN26) pin
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+ *
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+ * SW6 (D2) 3 pin
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+ * SW7 (D5) ON
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+ * SW8 (D3) 3 pin
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+ * SW10 (D4) 1 pin
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+ * SW12 (CLK) 1 pin
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+ * SW13 (D6) 3 pin
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+ * SW14 (CMD) ON
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+ * SW15 (D6) 1 pin
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+ * SW16 (D0) ON
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+ * SW17 (D1) ON
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+ * SW18 (D7) 3 pin
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+ * SW19 (MMC) 1 pin
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+ */
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+
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+/* Dummy supplies, where voltage doesn't matter */
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+static struct regulator_consumer_supply dummy_supplies[] = {
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+ REGULATOR_SUPPLY("vddvario", "smsc911x"),
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+ REGULATOR_SUPPLY("vdd33a", "smsc911x"),
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+};
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+
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static struct smsc911x_platform_config smsc911x_data = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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@@ -38,29 +76,119 @@ static struct resource smsc911x_resources[] = {
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DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
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};
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+/* SDHI */
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+static struct sh_mobile_sdhi_info sdhi0_info = {
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+ .tmio_caps = MMC_CAP_SD_HIGHSPEED,
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+ .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
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+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
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+};
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+
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+static struct sh_eth_plat_data ether_platform_data __initdata = {
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+ .phy = 0x01,
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+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
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+ .register_type = SH_ETH_REG_FAST_RCAR,
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+ .phy_interface = PHY_INTERFACE_MODE_RMII,
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+ /*
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+ * Although the LINK signal is available on the board, it's connected to
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+ * the link/activity LED output of the PHY, thus the link disappears and
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+ * reappears after each packet. We'd be better off ignoring such signal
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+ * and getting the link state from the PHY indirectly.
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+ */
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+ .no_ether_link = 1,
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+};
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+
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+/* I2C */
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+static struct i2c_board_info i2c0_devices[] = {
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+ {
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+ I2C_BOARD_INFO("rx8581", 0x51),
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+ },
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+};
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+
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+/* HSPI*/
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+static struct mtd_partition m25p80_spi_flash_partitions[] = {
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+ {
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+ .name = "data(spi)",
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+ .size = 0x0100000,
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+ .offset = 0,
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+ },
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+};
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+
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+static struct flash_platform_data spi_flash_data = {
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+ .name = "m25p80",
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+ .type = "s25fl008k",
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+ .parts = m25p80_spi_flash_partitions,
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+ .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
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+};
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+
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+static struct spi_board_info spi_board_info[] __initdata = {
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+ {
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+ .modalias = "m25p80",
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+ .max_speed_hz = 104000000,
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+ .chip_select = 0,
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+ .bus_num = 0,
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+ .mode = SPI_MODE_0,
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+ .platform_data = &spi_flash_data,
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+ },
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+};
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+
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+/* MMC */
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+static struct sh_mmcif_plat_data sh_mmcif_plat = {
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+ .sup_pclk = 0,
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+ .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
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+ .caps = MMC_CAP_4_BIT_DATA |
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+ MMC_CAP_8_BIT_DATA |
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+ MMC_CAP_NEEDS_POLL,
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+};
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+
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static const struct pinctrl_map bockw_pinctrl_map[] = {
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+ /* Ether */
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+ PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
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+ "ether_rmii", "ether"),
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+ /* HSPI0 */
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+ PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
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+ "hspi0_a", "hspi0"),
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+ /* MMC */
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+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
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+ "mmc_data8", "mmc"),
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+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
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+ "mmc_ctrl", "mmc"),
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/* SCIF0 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
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"scif0_data_a", "scif0"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
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"scif0_ctrl", "scif0"),
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+ /* SDHI0 */
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+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
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+ "sdhi0", "sdhi0"),
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};
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+#define FPGA 0x18200000
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#define IRQ0MR 0x30
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+#define PFC 0xfffc0000
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+#define PUPR4 0x110
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static void __init bockw_init(void)
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{
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- void __iomem *fpga;
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+ void __iomem *base;
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r8a7778_clock_init();
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r8a7778_init_irq_extpin(1);
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r8a7778_add_standard_devices();
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+ r8a7778_add_ether_device(ðer_platform_data);
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+ r8a7778_add_i2c_device(0);
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+ r8a7778_add_hspi_device(0);
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+ r8a7778_add_mmc_device(&sh_mmcif_plat);
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+ i2c_register_board_info(0, i2c0_devices,
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+ ARRAY_SIZE(i2c0_devices));
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+ spi_register_board_info(spi_board_info,
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+ ARRAY_SIZE(spi_board_info));
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pinctrl_register_mappings(bockw_pinctrl_map,
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ARRAY_SIZE(bockw_pinctrl_map));
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r8a7778_pinmux_init();
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- fpga = ioremap_nocache(0x18200000, SZ_1M);
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- if (fpga) {
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+ /* for SMSC */
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+ base = ioremap_nocache(FPGA, SZ_1M);
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+ if (base) {
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/*
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* CAUTION
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*
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@@ -68,16 +196,33 @@ static void __init bockw_init(void)
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* it should be cared in the future
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* Now, it is assuming IRQ0 was used only from SMSC.
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*/
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- u16 val = ioread16(fpga + IRQ0MR);
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+ u16 val = ioread16(base + IRQ0MR);
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val &= ~(1 << 4); /* enable SMSC911x */
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- iowrite16(val, fpga + IRQ0MR);
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- iounmap(fpga);
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+ iowrite16(val, base + IRQ0MR);
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+ iounmap(base);
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+
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+ regulator_register_fixed(0, dummy_supplies,
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+ ARRAY_SIZE(dummy_supplies));
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platform_device_register_resndata(
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&platform_bus, "smsc911x", -1,
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smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
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&smsc911x_data, sizeof(smsc911x_data));
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}
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+
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+ /* for SDHI */
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+ base = ioremap_nocache(PFC, 0x200);
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+ if (base) {
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+ /*
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+ * FIXME
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+ *
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+ * SDHI CD/WP pin needs pull-up
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+ */
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+ iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
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+ iounmap(base);
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+
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+ r8a7778_sdhi_init(0, &sdhi0_info);
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+ }
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}
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static const char *bockw_boards_compat_dt[] __initdata = {
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