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@@ -1,28 +1,12 @@
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/*
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- * TI DAVINCI dma definitions
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+ * TI EDMA definitions
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*
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- * Copyright (C) 2006-2009 Texas Instruments.
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+ * Copyright (C) 2006-2013 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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- *
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- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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- *
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- * You should have received a copy of the GNU General Public License along
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- * with this program; if not, write to the Free Software Foundation, Inc.,
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- * 675 Mass Ave, Cambridge, MA 02139, USA.
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- *
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*/
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/*
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@@ -69,11 +53,6 @@ struct edmacc_param {
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unsigned int ccnt;
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};
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-#define CCINT0_INTERRUPT 16
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-#define CCERRINT_INTERRUPT 17
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-#define TCERRINT0_INTERRUPT 18
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-#define TCERRINT1_INTERRUPT 19
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-
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/* fields in edmacc_param.opt */
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#define SAM BIT(0)
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#define DAM BIT(1)
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@@ -87,70 +66,6 @@ struct edmacc_param {
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#define TCCHEN BIT(22)
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#define ITCCHEN BIT(23)
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-#define TRWORD (0x7<<2)
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-#define PAENTRY (0x1ff<<5)
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-
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-/* Drivers should avoid using these symbolic names for dm644x
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- * channels, and use platform_device IORESOURCE_DMA resources
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- * instead. (Other DaVinci chips have different peripherals
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- * and thus have different DMA channel mappings.)
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- */
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-#define DAVINCI_DMA_MCBSP_TX 2
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-#define DAVINCI_DMA_MCBSP_RX 3
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-#define DAVINCI_DMA_VPSS_HIST 4
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-#define DAVINCI_DMA_VPSS_H3A 5
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-#define DAVINCI_DMA_VPSS_PRVU 6
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-#define DAVINCI_DMA_VPSS_RSZ 7
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-#define DAVINCI_DMA_IMCOP_IMXINT 8
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-#define DAVINCI_DMA_IMCOP_VLCDINT 9
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-#define DAVINCI_DMA_IMCO_PASQINT 10
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-#define DAVINCI_DMA_IMCOP_DSQINT 11
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-#define DAVINCI_DMA_SPI_SPIX 16
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-#define DAVINCI_DMA_SPI_SPIR 17
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-#define DAVINCI_DMA_UART0_URXEVT0 18
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-#define DAVINCI_DMA_UART0_UTXEVT0 19
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-#define DAVINCI_DMA_UART1_URXEVT1 20
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-#define DAVINCI_DMA_UART1_UTXEVT1 21
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-#define DAVINCI_DMA_UART2_URXEVT2 22
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-#define DAVINCI_DMA_UART2_UTXEVT2 23
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-#define DAVINCI_DMA_MEMSTK_MSEVT 24
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-#define DAVINCI_DMA_MMCRXEVT 26
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-#define DAVINCI_DMA_MMCTXEVT 27
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-#define DAVINCI_DMA_I2C_ICREVT 28
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-#define DAVINCI_DMA_I2C_ICXEVT 29
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-#define DAVINCI_DMA_GPIO_GPINT0 32
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-#define DAVINCI_DMA_GPIO_GPINT1 33
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-#define DAVINCI_DMA_GPIO_GPINT2 34
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-#define DAVINCI_DMA_GPIO_GPINT3 35
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-#define DAVINCI_DMA_GPIO_GPINT4 36
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-#define DAVINCI_DMA_GPIO_GPINT5 37
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-#define DAVINCI_DMA_GPIO_GPINT6 38
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-#define DAVINCI_DMA_GPIO_GPINT7 39
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-#define DAVINCI_DMA_GPIO_GPBNKINT0 40
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-#define DAVINCI_DMA_GPIO_GPBNKINT1 41
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-#define DAVINCI_DMA_GPIO_GPBNKINT2 42
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-#define DAVINCI_DMA_GPIO_GPBNKINT3 43
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-#define DAVINCI_DMA_GPIO_GPBNKINT4 44
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-#define DAVINCI_DMA_TIMER0_TINT0 48
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-#define DAVINCI_DMA_TIMER1_TINT1 49
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-#define DAVINCI_DMA_TIMER2_TINT2 50
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-#define DAVINCI_DMA_TIMER3_TINT3 51
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-#define DAVINCI_DMA_PWM0 52
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-#define DAVINCI_DMA_PWM1 53
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-#define DAVINCI_DMA_PWM2 54
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-
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-/* DA830 specific EDMA3 information */
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-#define EDMA_DA830_NUM_DMACH 32
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-#define EDMA_DA830_NUM_TCC 32
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-#define EDMA_DA830_NUM_PARAMENTRY 128
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-#define EDMA_DA830_NUM_EVQUE 2
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-#define EDMA_DA830_NUM_TC 2
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-#define EDMA_DA830_CHMAP_EXIST 0
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-#define EDMA_DA830_NUM_REGIONS 4
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-#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
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-#define DA830_DMACH2EVENT_MAP1 0x00000000u
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-#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
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-
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/*ch_status paramater of callback function possible values*/
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#define DMA_COMPLETE 1
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#define DMA_CC_ERROR 2
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