devices.c 8.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349
  1. /*
  2. * mach-davinci/devices.c
  3. *
  4. * DaVinci platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/io.h>
  15. #include <mach/hardware.h>
  16. #include <linux/platform_data/i2c-davinci.h>
  17. #include <mach/irqs.h>
  18. #include <mach/cputype.h>
  19. #include <mach/mux.h>
  20. #include <linux/platform_data/mmc-davinci.h>
  21. #include <mach/time.h>
  22. #include <linux/platform_data/edma.h>
  23. #include "davinci.h"
  24. #include "clock.h"
  25. #define DAVINCI_I2C_BASE 0x01C21000
  26. #define DAVINCI_ATA_BASE 0x01C66000
  27. #define DAVINCI_MMCSD0_BASE 0x01E10000
  28. #define DM355_MMCSD0_BASE 0x01E11000
  29. #define DM355_MMCSD1_BASE 0x01E00000
  30. #define DM365_MMCSD0_BASE 0x01D11000
  31. #define DM365_MMCSD1_BASE 0x01D00000
  32. #define DAVINCI_DMA_MMCRXEVT 26
  33. #define DAVINCI_DMA_MMCTXEVT 27
  34. void __iomem *davinci_sysmod_base;
  35. void davinci_map_sysmod(void)
  36. {
  37. davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
  38. 0x800);
  39. /*
  40. * Throw a bug since a lot of board initialization code depends
  41. * on system module availability. ioremap() failing this early
  42. * need careful looking into anyway.
  43. */
  44. BUG_ON(!davinci_sysmod_base);
  45. }
  46. static struct resource i2c_resources[] = {
  47. {
  48. .start = DAVINCI_I2C_BASE,
  49. .end = DAVINCI_I2C_BASE + 0x40,
  50. .flags = IORESOURCE_MEM,
  51. },
  52. {
  53. .start = IRQ_I2C,
  54. .flags = IORESOURCE_IRQ,
  55. },
  56. };
  57. static struct platform_device davinci_i2c_device = {
  58. .name = "i2c_davinci",
  59. .id = 1,
  60. .num_resources = ARRAY_SIZE(i2c_resources),
  61. .resource = i2c_resources,
  62. };
  63. void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
  64. {
  65. if (cpu_is_davinci_dm644x())
  66. davinci_cfg_reg(DM644X_I2C);
  67. davinci_i2c_device.dev.platform_data = pdata;
  68. (void) platform_device_register(&davinci_i2c_device);
  69. }
  70. static struct resource ide_resources[] = {
  71. {
  72. .start = DAVINCI_ATA_BASE,
  73. .end = DAVINCI_ATA_BASE + 0x7ff,
  74. .flags = IORESOURCE_MEM,
  75. },
  76. {
  77. .start = IRQ_IDE,
  78. .end = IRQ_IDE,
  79. .flags = IORESOURCE_IRQ,
  80. },
  81. };
  82. static u64 ide_dma_mask = DMA_BIT_MASK(32);
  83. static struct platform_device ide_device = {
  84. .name = "palm_bk3710",
  85. .id = -1,
  86. .resource = ide_resources,
  87. .num_resources = ARRAY_SIZE(ide_resources),
  88. .dev = {
  89. .dma_mask = &ide_dma_mask,
  90. .coherent_dma_mask = DMA_BIT_MASK(32),
  91. },
  92. };
  93. void __init davinci_init_ide(void)
  94. {
  95. if (cpu_is_davinci_dm644x()) {
  96. davinci_cfg_reg(DM644X_HPIEN_DISABLE);
  97. davinci_cfg_reg(DM644X_ATAEN);
  98. davinci_cfg_reg(DM644X_HDIREN);
  99. } else if (cpu_is_davinci_dm646x()) {
  100. /* IRQ_DM646X_IDE is the same as IRQ_IDE */
  101. davinci_cfg_reg(DM646X_ATAEN);
  102. } else {
  103. WARN_ON(1);
  104. return;
  105. }
  106. platform_device_register(&ide_device);
  107. }
  108. #if IS_ENABLED(CONFIG_MMC_DAVINCI)
  109. static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
  110. static struct resource mmcsd0_resources[] = {
  111. {
  112. /* different on dm355 */
  113. .start = DAVINCI_MMCSD0_BASE,
  114. .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
  115. .flags = IORESOURCE_MEM,
  116. },
  117. /* IRQs: MMC/SD, then SDIO */
  118. {
  119. .start = IRQ_MMCINT,
  120. .flags = IORESOURCE_IRQ,
  121. }, {
  122. /* different on dm355 */
  123. .start = IRQ_SDIOINT,
  124. .flags = IORESOURCE_IRQ,
  125. },
  126. /* DMA channels: RX, then TX */
  127. {
  128. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
  129. .flags = IORESOURCE_DMA,
  130. }, {
  131. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
  132. .flags = IORESOURCE_DMA,
  133. },
  134. };
  135. static struct platform_device davinci_mmcsd0_device = {
  136. .name = "dm6441-mmc",
  137. .id = 0,
  138. .dev = {
  139. .dma_mask = &mmcsd0_dma_mask,
  140. .coherent_dma_mask = DMA_BIT_MASK(32),
  141. },
  142. .num_resources = ARRAY_SIZE(mmcsd0_resources),
  143. .resource = mmcsd0_resources,
  144. };
  145. static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
  146. static struct resource mmcsd1_resources[] = {
  147. {
  148. .start = DM355_MMCSD1_BASE,
  149. .end = DM355_MMCSD1_BASE + SZ_4K - 1,
  150. .flags = IORESOURCE_MEM,
  151. },
  152. /* IRQs: MMC/SD, then SDIO */
  153. {
  154. .start = IRQ_DM355_MMCINT1,
  155. .flags = IORESOURCE_IRQ,
  156. }, {
  157. .start = IRQ_DM355_SDIOINT1,
  158. .flags = IORESOURCE_IRQ,
  159. },
  160. /* DMA channels: RX, then TX */
  161. {
  162. .start = EDMA_CTLR_CHAN(0, 30), /* rx */
  163. .flags = IORESOURCE_DMA,
  164. }, {
  165. .start = EDMA_CTLR_CHAN(0, 31), /* tx */
  166. .flags = IORESOURCE_DMA,
  167. },
  168. };
  169. static struct platform_device davinci_mmcsd1_device = {
  170. .name = "dm6441-mmc",
  171. .id = 1,
  172. .dev = {
  173. .dma_mask = &mmcsd1_dma_mask,
  174. .coherent_dma_mask = DMA_BIT_MASK(32),
  175. },
  176. .num_resources = ARRAY_SIZE(mmcsd1_resources),
  177. .resource = mmcsd1_resources,
  178. };
  179. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  180. {
  181. struct platform_device *pdev = NULL;
  182. if (WARN_ON(cpu_is_davinci_dm646x()))
  183. return;
  184. /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
  185. * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
  186. *
  187. * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
  188. * not handled right here ...
  189. */
  190. switch (module) {
  191. case 1:
  192. if (cpu_is_davinci_dm355()) {
  193. /* REVISIT we may not need all these pins if e.g. this
  194. * is a hard-wired SDIO device...
  195. */
  196. davinci_cfg_reg(DM355_SD1_CMD);
  197. davinci_cfg_reg(DM355_SD1_CLK);
  198. davinci_cfg_reg(DM355_SD1_DATA0);
  199. davinci_cfg_reg(DM355_SD1_DATA1);
  200. davinci_cfg_reg(DM355_SD1_DATA2);
  201. davinci_cfg_reg(DM355_SD1_DATA3);
  202. } else if (cpu_is_davinci_dm365()) {
  203. /* Configure pull down control */
  204. unsigned v;
  205. v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  206. __raw_writel(v & ~0xfc0,
  207. DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  208. mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
  209. mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
  210. SZ_4K - 1;
  211. mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
  212. davinci_mmcsd1_device.name = "da830-mmc";
  213. } else
  214. break;
  215. pdev = &davinci_mmcsd1_device;
  216. break;
  217. case 0:
  218. if (cpu_is_davinci_dm355()) {
  219. mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
  220. mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
  221. mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
  222. /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
  223. davinci_cfg_reg(DM355_MMCSD0);
  224. /* enable RX EDMA */
  225. davinci_cfg_reg(DM355_EVT26_MMC0_RX);
  226. } else if (cpu_is_davinci_dm365()) {
  227. mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
  228. mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
  229. SZ_4K - 1;
  230. mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
  231. davinci_mmcsd0_device.name = "da830-mmc";
  232. } else if (cpu_is_davinci_dm644x()) {
  233. /* REVISIT: should this be in board-init code? */
  234. /* Power-on 3.3V IO cells */
  235. __raw_writel(0,
  236. DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
  237. /*Set up the pull regiter for MMC */
  238. davinci_cfg_reg(DM644X_MSTK);
  239. }
  240. pdev = &davinci_mmcsd0_device;
  241. break;
  242. }
  243. if (WARN_ON(!pdev))
  244. return;
  245. pdev->dev.platform_data = config;
  246. platform_device_register(pdev);
  247. }
  248. #else
  249. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  250. {
  251. }
  252. #endif
  253. /*-------------------------------------------------------------------------*/
  254. static struct resource wdt_resources[] = {
  255. {
  256. .start = DAVINCI_WDOG_BASE,
  257. .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. };
  261. struct platform_device davinci_wdt_device = {
  262. .name = "watchdog",
  263. .id = -1,
  264. .num_resources = ARRAY_SIZE(wdt_resources),
  265. .resource = wdt_resources,
  266. };
  267. void davinci_restart(char mode, const char *cmd)
  268. {
  269. davinci_watchdog_reset(&davinci_wdt_device);
  270. }
  271. static void davinci_init_wdt(void)
  272. {
  273. platform_device_register(&davinci_wdt_device);
  274. }
  275. /*-------------------------------------------------------------------------*/
  276. /*-------------------------------------------------------------------------*/
  277. struct davinci_timer_instance davinci_timer_instance[2] = {
  278. {
  279. .base = DAVINCI_TIMER0_BASE,
  280. .bottom_irq = IRQ_TINT0_TINT12,
  281. .top_irq = IRQ_TINT0_TINT34,
  282. },
  283. {
  284. .base = DAVINCI_TIMER1_BASE,
  285. .bottom_irq = IRQ_TINT1_TINT12,
  286. .top_irq = IRQ_TINT1_TINT34,
  287. },
  288. };
  289. /*-------------------------------------------------------------------------*/
  290. static int __init davinci_init_devices(void)
  291. {
  292. /* please keep these calls, and their implementations above,
  293. * in alphabetical order so they're easier to sort through.
  294. */
  295. davinci_init_wdt();
  296. return 0;
  297. }
  298. arch_initcall(davinci_init_devices);