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@@ -288,13 +288,11 @@ SystemCall:
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* For the MPC8xx, this is a software tablewalk to load the instruction
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* TLB. It is modelled after the example in the Motorola manual. The task
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* switch loads the M_TWB register with the pointer to the first level table.
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- * If we discover there is no second level table (the value is zero), the
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- * plan was to load that into the TLB, which causes another fault into the
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- * TLB Error interrupt where we can handle such problems. However, that did
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- * not work, so if we discover there is no second level table, we restore
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- * registers and branch to the error exception. We have to use the MD_xxx
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- * registers for the tablewalk because the equivalent MI_xxx registers
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- * only perform the attribute functions.
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+ * If we discover there is no second level table (value is zero) or if there
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+ * is an invalid pte, we load that into the TLB, which causes another fault
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+ * into the TLB Error interrupt where we can handle such problems.
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+ * We have to use the MD_xxx registers for the tablewalk because the
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+ * equivalent MI_xxx registers only perform the attribute functions.
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*/
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InstructionTLBMiss:
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#ifdef CONFIG_8xx_CPU6
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