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@@ -89,6 +89,7 @@ enum {
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board_ahci_sb600 = 3,
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board_ahci_mv = 4,
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board_ahci_sb700 = 5,
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+ board_ahci_mcp65 = 6,
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/* global controller registers */
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HOST_CAP = 0x00, /* host capabilities */
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@@ -190,6 +191,7 @@ enum {
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AHCI_HFLAG_NO_PMP = (1 << 6), /* no PMP */
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AHCI_HFLAG_NO_HOTPLUG = (1 << 7), /* ignore PxSERR.DIAG.N */
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AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */
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+ AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */
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/* ap->flags bits */
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@@ -253,6 +255,8 @@ static void ahci_pmp_attach(struct ata_port *ap);
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static void ahci_pmp_detach(struct ata_port *ap);
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static int ahci_softreset(struct ata_link *link, unsigned int *class,
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unsigned long deadline);
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+static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class,
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+ unsigned long deadline);
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static int ahci_hardreset(struct ata_link *link, unsigned int *class,
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unsigned long deadline);
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static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
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@@ -329,6 +333,12 @@ static struct ata_port_operations ahci_p5wdh_ops = {
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.hardreset = ahci_p5wdh_hardreset,
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};
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+static struct ata_port_operations ahci_sb600_ops = {
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+ .inherits = &ahci_ops,
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+ .softreset = ahci_sb600_softreset,
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+ .pmp_softreset = ahci_sb600_softreset,
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+};
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+
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#define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
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static const struct ata_port_info ahci_port_info[] = {
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@@ -359,11 +369,11 @@ static const struct ata_port_info ahci_port_info[] = {
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{
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AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL |
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AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI |
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- AHCI_HFLAG_SECT255 | AHCI_HFLAG_NO_PMP),
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+ AHCI_HFLAG_SECT255),
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = 0x1f, /* pio0-4 */
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.udma_mask = ATA_UDMA6,
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- .port_ops = &ahci_ops,
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+ .port_ops = &ahci_sb600_ops,
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},
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/* board_ahci_mv */
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{
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@@ -377,8 +387,15 @@ static const struct ata_port_info ahci_port_info[] = {
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},
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/* board_ahci_sb700 */
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{
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- AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL |
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- AHCI_HFLAG_NO_PMP),
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+ AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL),
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+ .flags = AHCI_FLAG_COMMON,
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+ .pio_mask = 0x1f, /* pio0-4 */
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+ .udma_mask = ATA_UDMA6,
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+ .port_ops = &ahci_sb600_ops,
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+ },
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+ /* board_ahci_mcp65 */
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+ {
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+ AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ),
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = 0x1f, /* pio0-4 */
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.udma_mask = ATA_UDMA6,
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@@ -438,14 +455,14 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251 }, /* VIA VT8251 */
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/* NVIDIA */
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- { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci }, /* MCP65 */
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- { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */
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+ { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */
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{ PCI_VDEVICE(NVIDIA, 0x0550), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0551), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0552), board_ahci }, /* MCP67 */
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@@ -624,6 +641,12 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
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cap &= ~HOST_CAP_NCQ;
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}
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+ if (!(cap & HOST_CAP_NCQ) && (hpriv->flags & AHCI_HFLAG_YES_NCQ)) {
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+ dev_printk(KERN_INFO, &pdev->dev,
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+ "controller can do NCQ, turning on CAP_NCQ\n");
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+ cap |= HOST_CAP_NCQ;
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+ }
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+
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if ((cap & HOST_CAP_PMP) && (hpriv->flags & AHCI_HFLAG_NO_PMP)) {
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dev_printk(KERN_INFO, &pdev->dev,
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"controller can't do PMP, turning off CAP_PMP\n");
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@@ -1262,19 +1285,11 @@ static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,
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return 0;
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}
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-static int ahci_check_ready(struct ata_link *link)
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-{
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- void __iomem *port_mmio = ahci_port_base(link->ap);
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- u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
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-
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- return ata_check_ready(status);
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-}
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-
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-static int ahci_softreset(struct ata_link *link, unsigned int *class,
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- unsigned long deadline)
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+static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
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+ int pmp, unsigned long deadline,
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+ int (*check_ready)(struct ata_link *link))
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{
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struct ata_port *ap = link->ap;
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- int pmp = sata_srst_pmp(link);
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const char *reason = NULL;
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unsigned long now, msecs;
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struct ata_taskfile tf;
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@@ -1312,7 +1327,7 @@ static int ahci_softreset(struct ata_link *link, unsigned int *class,
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ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
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/* wait for link to become ready */
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- rc = ata_wait_after_reset(link, deadline, ahci_check_ready);
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+ rc = ata_wait_after_reset(link, deadline, check_ready);
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/* link occupied, -ENODEV too is an error */
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if (rc) {
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reason = "device not ready";
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@@ -1328,6 +1343,72 @@ static int ahci_softreset(struct ata_link *link, unsigned int *class,
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return rc;
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}
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+static int ahci_check_ready(struct ata_link *link)
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+{
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+ void __iomem *port_mmio = ahci_port_base(link->ap);
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+ u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
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+
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+ return ata_check_ready(status);
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+}
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+
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+static int ahci_softreset(struct ata_link *link, unsigned int *class,
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+ unsigned long deadline)
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+{
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+ int pmp = sata_srst_pmp(link);
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+
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+ DPRINTK("ENTER\n");
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+
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+ return ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
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+}
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+
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+static int ahci_sb600_check_ready(struct ata_link *link)
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+{
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+ void __iomem *port_mmio = ahci_port_base(link->ap);
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+ u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
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+ u32 irq_status = readl(port_mmio + PORT_IRQ_STAT);
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+
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+ /*
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+ * There is no need to check TFDATA if BAD PMP is found due to HW bug,
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+ * which can save timeout delay.
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+ */
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+ if (irq_status & PORT_IRQ_BAD_PMP)
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+ return -EIO;
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+
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+ return ata_check_ready(status);
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+}
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+
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+static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class,
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+ unsigned long deadline)
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+{
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+ struct ata_port *ap = link->ap;
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+ void __iomem *port_mmio = ahci_port_base(ap);
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+ int pmp = sata_srst_pmp(link);
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+ int rc;
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+ u32 irq_sts;
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+
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+ DPRINTK("ENTER\n");
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+
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+ rc = ahci_do_softreset(link, class, pmp, deadline,
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+ ahci_sb600_check_ready);
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+
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+ /*
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+ * Soft reset fails on some ATI chips with IPMS set when PMP
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+ * is enabled but SATA HDD/ODD is connected to SATA port,
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+ * do soft reset again to port 0.
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+ */
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+ if (rc == -EIO) {
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+ irq_sts = readl(port_mmio + PORT_IRQ_STAT);
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+ if (irq_sts & PORT_IRQ_BAD_PMP) {
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+ ata_link_printk(link, KERN_WARNING,
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+ "failed due to HW bug, retry pmp=0\n");
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+ rc = ahci_do_softreset(link, class, 0, deadline,
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+ ahci_check_ready);
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+ }
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+ }
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+
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+ return rc;
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+}
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+
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static int ahci_hardreset(struct ata_link *link, unsigned int *class,
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unsigned long deadline)
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{
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@@ -2118,7 +2199,8 @@ static void ahci_p5wdh_workaround(struct ata_host *host)
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static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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static int printed_version;
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- struct ata_port_info pi = ahci_port_info[ent->driver_data];
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+ unsigned int board_id = ent->driver_data;
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+ struct ata_port_info pi = ahci_port_info[board_id];
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const struct ata_port_info *ppi[] = { &pi, NULL };
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struct device *dev = &pdev->dev;
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struct ahci_host_priv *hpriv;
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@@ -2167,6 +2249,11 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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return -ENOMEM;
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hpriv->flags |= (unsigned long)pi.private_data;
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+ /* MCP65 revision A1 and A2 can't do MSI */
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+ if (board_id == board_ahci_mcp65 &&
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+ (pdev->revision == 0xa1 || pdev->revision == 0xa2))
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+ hpriv->flags |= AHCI_HFLAG_NO_MSI;
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+
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if ((hpriv->flags & AHCI_HFLAG_NO_MSI) || pci_enable_msi(pdev))
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pci_intx(pdev, 1);
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