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@@ -8,53 +8,8 @@
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*
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* May be copied or modified under the terms of the GNU General Public License
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*
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- * PIO mode setting function for Intel chipsets.
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- * For use instead of BIOS settings.
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+ * Documentation:
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*
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- * 40-41
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- * 42-43
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- *
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- * 41
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- * 43
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- *
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- * | PIO 0 | c0 | 80 | 0 |
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- * | PIO 2 | SW2 | d0 | 90 | 4 |
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- * | PIO 3 | MW1 | e1 | a1 | 9 |
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- * | PIO 4 | MW2 | e3 | a3 | b |
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- *
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- * sitre = word40 & 0x4000; primary
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- * sitre = word42 & 0x4000; secondary
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- *
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- * 44 8421|8421 hdd|hdb
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- *
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- * 48 8421 hdd|hdc|hdb|hda udma enabled
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- *
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- * 0001 hda
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- * 0010 hdb
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- * 0100 hdc
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- * 1000 hdd
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- *
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- * 4a 84|21 hdb|hda
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- * 4b 84|21 hdd|hdc
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- *
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- * ata-33/82371AB
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- * ata-33/82371EB
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- * ata-33/82801AB ata-66/82801AA
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- * 00|00 udma 0 00|00 reserved
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- * 01|01 udma 1 01|01 udma 3
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- * 10|10 udma 2 10|10 udma 4
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- * 11|11 reserved 11|11 reserved
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- *
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- * 54 8421|8421 ata66 drive|ata66 enable
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- *
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- * pci_read_config_word(HWIF(drive)->pci_dev, 0x40, ®40);
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- * pci_read_config_word(HWIF(drive)->pci_dev, 0x42, ®42);
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- * pci_read_config_word(HWIF(drive)->pci_dev, 0x44, ®44);
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- * pci_read_config_byte(HWIF(drive)->pci_dev, 0x48, ®48);
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- * pci_read_config_word(HWIF(drive)->pci_dev, 0x4a, ®4a);
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- * pci_read_config_byte(HWIF(drive)->pci_dev, 0x54, ®54);
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- *
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- * Documentation
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* Publically available from Intel web site. Errata documentation
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* is also publically available. As an aide to anyone hacking on this
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* driver the list of errata that are relevant is below.going back to
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