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@@ -1033,10 +1033,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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{
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char *cpu, *mmu, *fpu, *vendor, *cache;
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uint32_t revid;
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-
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+ int cpu_num = *(unsigned int *)v;
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u_long sclk, cclk;
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u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
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- struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, *(unsigned int *)v);
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+ struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
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cpu = CPU;
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mmu = "none";
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@@ -1055,8 +1055,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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break;
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}
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- seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n",
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- *(unsigned int *)v, vendor);
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+ seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
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if (CPUID == bfin_cpuid())
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seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
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@@ -1137,9 +1136,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
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BFIN_DLINES);
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#ifdef __ARCH_SYNC_CORE_DCACHE
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- seq_printf(m,
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- "SMP Dcache Flushes\t: %lu\n\n",
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- per_cpu(cpu_data, *(unsigned int *)v).dcache_invld_count);
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+ seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
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#endif
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#ifdef CONFIG_BFIN_ICACHE_LOCK
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switch ((cpudata->imemctl >> 3) & WAYALL_L) {
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@@ -1192,12 +1189,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "No Ways are locked\n");
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}
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#endif
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- if (*(unsigned int *)v != NR_CPUS-1)
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+
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+ if (cpu_num != num_possible_cpus() - 1)
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return 0;
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-#if L2_LENGTH
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- seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
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-#endif
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+ if (L2_LENGTH)
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+ seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
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seq_printf(m, "board name\t: %s\n", bfin_board_name);
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seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
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physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
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