setup.c 33 KB

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  1. /*
  2. * arch/blackfin/kernel/setup.c
  3. *
  4. * Copyright 2004-2006 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/console.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/seq_file.h>
  14. #include <linux/cpu.h>
  15. #include <linux/mm.h>
  16. #include <linux/module.h>
  17. #include <linux/tty.h>
  18. #include <linux/pfn.h>
  19. #include <linux/ext2_fs.h>
  20. #include <linux/cramfs_fs.h>
  21. #include <linux/romfs_fs.h>
  22. #include <asm/cplb.h>
  23. #include <asm/cacheflush.h>
  24. #include <asm/blackfin.h>
  25. #include <asm/cplbinit.h>
  26. #include <asm/div64.h>
  27. #include <asm/cpu.h>
  28. #include <asm/fixed_code.h>
  29. #include <asm/early_printk.h>
  30. u16 _bfin_swrst;
  31. EXPORT_SYMBOL(_bfin_swrst);
  32. unsigned long memory_start, memory_end, physical_mem_end;
  33. unsigned long _rambase, _ramstart, _ramend;
  34. unsigned long reserved_mem_dcache_on;
  35. unsigned long reserved_mem_icache_on;
  36. EXPORT_SYMBOL(memory_start);
  37. EXPORT_SYMBOL(memory_end);
  38. EXPORT_SYMBOL(physical_mem_end);
  39. EXPORT_SYMBOL(_ramend);
  40. EXPORT_SYMBOL(reserved_mem_dcache_on);
  41. #ifdef CONFIG_MTD_UCLINUX
  42. unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  43. unsigned long _ebss;
  44. EXPORT_SYMBOL(memory_mtd_end);
  45. EXPORT_SYMBOL(memory_mtd_start);
  46. EXPORT_SYMBOL(mtd_size);
  47. #endif
  48. char __initdata command_line[COMMAND_LINE_SIZE];
  49. void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  50. *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  51. /* boot memmap, for parsing "memmap=" */
  52. #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
  53. #define BFIN_MEMMAP_RAM 1
  54. #define BFIN_MEMMAP_RESERVED 2
  55. struct bfin_memmap {
  56. int nr_map;
  57. struct bfin_memmap_entry {
  58. unsigned long long addr; /* start of memory segment */
  59. unsigned long long size;
  60. unsigned long type;
  61. } map[BFIN_MEMMAP_MAX];
  62. } bfin_memmap __initdata;
  63. /* for memmap sanitization */
  64. struct change_member {
  65. struct bfin_memmap_entry *pentry; /* pointer to original entry */
  66. unsigned long long addr; /* address for this change point */
  67. };
  68. static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  69. static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  70. static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  71. static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  72. DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  73. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  74. void __init generate_cplb_tables(void)
  75. {
  76. unsigned int cpu;
  77. /* Generate per-CPU I&D CPLB tables */
  78. for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  79. generate_cplb_tables_cpu(cpu);
  80. }
  81. #endif
  82. void __cpuinit bfin_setup_caches(unsigned int cpu)
  83. {
  84. #ifdef CONFIG_BFIN_ICACHE
  85. #ifdef CONFIG_MPU
  86. bfin_icache_init(icplb_tbl[cpu]);
  87. #else
  88. bfin_icache_init(icplb_tables[cpu]);
  89. #endif
  90. #endif
  91. #ifdef CONFIG_BFIN_DCACHE
  92. #ifdef CONFIG_MPU
  93. bfin_dcache_init(dcplb_tbl[cpu]);
  94. #else
  95. bfin_dcache_init(dcplb_tables[cpu]);
  96. #endif
  97. #endif
  98. /*
  99. * In cache coherence emulation mode, we need to have the
  100. * D-cache enabled before running any atomic operation which
  101. * might invove cache invalidation (i.e. spinlock, rwlock).
  102. * So printk's are deferred until then.
  103. */
  104. #ifdef CONFIG_BFIN_ICACHE
  105. printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
  106. #endif
  107. #ifdef CONFIG_BFIN_DCACHE
  108. printk(KERN_INFO "Data Cache Enabled for CPU%u"
  109. # if defined CONFIG_BFIN_WB
  110. " (write-back)"
  111. # elif defined CONFIG_BFIN_WT
  112. " (write-through)"
  113. # endif
  114. "\n", cpu);
  115. #endif
  116. }
  117. void __cpuinit bfin_setup_cpudata(unsigned int cpu)
  118. {
  119. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
  120. cpudata->idle = current;
  121. cpudata->loops_per_jiffy = loops_per_jiffy;
  122. cpudata->imemctl = bfin_read_IMEM_CONTROL();
  123. cpudata->dmemctl = bfin_read_DMEM_CONTROL();
  124. }
  125. void __init bfin_cache_init(void)
  126. {
  127. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  128. generate_cplb_tables();
  129. #endif
  130. bfin_setup_caches(0);
  131. }
  132. void __init bfin_relocate_l1_mem(void)
  133. {
  134. unsigned long l1_code_length;
  135. unsigned long l1_data_a_length;
  136. unsigned long l1_data_b_length;
  137. unsigned long l2_length;
  138. blackfin_dma_early_init();
  139. l1_code_length = _etext_l1 - _stext_l1;
  140. if (l1_code_length > L1_CODE_LENGTH)
  141. panic("L1 Instruction SRAM Overflow\n");
  142. /* cannot complain as printk is not available as yet.
  143. * But we can continue booting and complain later!
  144. */
  145. /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
  146. dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
  147. l1_data_a_length = _sbss_l1 - _sdata_l1;
  148. if (l1_data_a_length > L1_DATA_A_LENGTH)
  149. panic("L1 Data SRAM Bank A Overflow\n");
  150. /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
  151. dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
  152. l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
  153. if (l1_data_b_length > L1_DATA_B_LENGTH)
  154. panic("L1 Data SRAM Bank B Overflow\n");
  155. /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
  156. dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
  157. l1_data_a_length, l1_data_b_length);
  158. if (L2_LENGTH != 0) {
  159. l2_length = _sbss_l2 - _stext_l2;
  160. if (l2_length > L2_LENGTH)
  161. panic("L2 SRAM Overflow\n");
  162. /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
  163. dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
  164. }
  165. }
  166. /* add_memory_region to memmap */
  167. static void __init add_memory_region(unsigned long long start,
  168. unsigned long long size, int type)
  169. {
  170. int i;
  171. i = bfin_memmap.nr_map;
  172. if (i == BFIN_MEMMAP_MAX) {
  173. printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
  174. return;
  175. }
  176. bfin_memmap.map[i].addr = start;
  177. bfin_memmap.map[i].size = size;
  178. bfin_memmap.map[i].type = type;
  179. bfin_memmap.nr_map++;
  180. }
  181. /*
  182. * Sanitize the boot memmap, removing overlaps.
  183. */
  184. static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
  185. {
  186. struct change_member *change_tmp;
  187. unsigned long current_type, last_type;
  188. unsigned long long last_addr;
  189. int chgidx, still_changing;
  190. int overlap_entries;
  191. int new_entry;
  192. int old_nr, new_nr, chg_nr;
  193. int i;
  194. /*
  195. Visually we're performing the following (1,2,3,4 = memory types)
  196. Sample memory map (w/overlaps):
  197. ____22__________________
  198. ______________________4_
  199. ____1111________________
  200. _44_____________________
  201. 11111111________________
  202. ____________________33__
  203. ___________44___________
  204. __________33333_________
  205. ______________22________
  206. ___________________2222_
  207. _________111111111______
  208. _____________________11_
  209. _________________4______
  210. Sanitized equivalent (no overlap):
  211. 1_______________________
  212. _44_____________________
  213. ___1____________________
  214. ____22__________________
  215. ______11________________
  216. _________1______________
  217. __________3_____________
  218. ___________44___________
  219. _____________33_________
  220. _______________2________
  221. ________________1_______
  222. _________________4______
  223. ___________________2____
  224. ____________________33__
  225. ______________________4_
  226. */
  227. /* if there's only one memory region, don't bother */
  228. if (*pnr_map < 2)
  229. return -1;
  230. old_nr = *pnr_map;
  231. /* bail out if we find any unreasonable addresses in memmap */
  232. for (i = 0; i < old_nr; i++)
  233. if (map[i].addr + map[i].size < map[i].addr)
  234. return -1;
  235. /* create pointers for initial change-point information (for sorting) */
  236. for (i = 0; i < 2*old_nr; i++)
  237. change_point[i] = &change_point_list[i];
  238. /* record all known change-points (starting and ending addresses),
  239. omitting those that are for empty memory regions */
  240. chgidx = 0;
  241. for (i = 0; i < old_nr; i++) {
  242. if (map[i].size != 0) {
  243. change_point[chgidx]->addr = map[i].addr;
  244. change_point[chgidx++]->pentry = &map[i];
  245. change_point[chgidx]->addr = map[i].addr + map[i].size;
  246. change_point[chgidx++]->pentry = &map[i];
  247. }
  248. }
  249. chg_nr = chgidx; /* true number of change-points */
  250. /* sort change-point list by memory addresses (low -> high) */
  251. still_changing = 1;
  252. while (still_changing) {
  253. still_changing = 0;
  254. for (i = 1; i < chg_nr; i++) {
  255. /* if <current_addr> > <last_addr>, swap */
  256. /* or, if current=<start_addr> & last=<end_addr>, swap */
  257. if ((change_point[i]->addr < change_point[i-1]->addr) ||
  258. ((change_point[i]->addr == change_point[i-1]->addr) &&
  259. (change_point[i]->addr == change_point[i]->pentry->addr) &&
  260. (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
  261. ) {
  262. change_tmp = change_point[i];
  263. change_point[i] = change_point[i-1];
  264. change_point[i-1] = change_tmp;
  265. still_changing = 1;
  266. }
  267. }
  268. }
  269. /* create a new memmap, removing overlaps */
  270. overlap_entries = 0; /* number of entries in the overlap table */
  271. new_entry = 0; /* index for creating new memmap entries */
  272. last_type = 0; /* start with undefined memory type */
  273. last_addr = 0; /* start with 0 as last starting address */
  274. /* loop through change-points, determining affect on the new memmap */
  275. for (chgidx = 0; chgidx < chg_nr; chgidx++) {
  276. /* keep track of all overlapping memmap entries */
  277. if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
  278. /* add map entry to overlap list (> 1 entry implies an overlap) */
  279. overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
  280. } else {
  281. /* remove entry from list (order independent, so swap with last) */
  282. for (i = 0; i < overlap_entries; i++) {
  283. if (overlap_list[i] == change_point[chgidx]->pentry)
  284. overlap_list[i] = overlap_list[overlap_entries-1];
  285. }
  286. overlap_entries--;
  287. }
  288. /* if there are overlapping entries, decide which "type" to use */
  289. /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
  290. current_type = 0;
  291. for (i = 0; i < overlap_entries; i++)
  292. if (overlap_list[i]->type > current_type)
  293. current_type = overlap_list[i]->type;
  294. /* continue building up new memmap based on this information */
  295. if (current_type != last_type) {
  296. if (last_type != 0) {
  297. new_map[new_entry].size =
  298. change_point[chgidx]->addr - last_addr;
  299. /* move forward only if the new size was non-zero */
  300. if (new_map[new_entry].size != 0)
  301. if (++new_entry >= BFIN_MEMMAP_MAX)
  302. break; /* no more space left for new entries */
  303. }
  304. if (current_type != 0) {
  305. new_map[new_entry].addr = change_point[chgidx]->addr;
  306. new_map[new_entry].type = current_type;
  307. last_addr = change_point[chgidx]->addr;
  308. }
  309. last_type = current_type;
  310. }
  311. }
  312. new_nr = new_entry; /* retain count for new entries */
  313. /* copy new mapping into original location */
  314. memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
  315. *pnr_map = new_nr;
  316. return 0;
  317. }
  318. static void __init print_memory_map(char *who)
  319. {
  320. int i;
  321. for (i = 0; i < bfin_memmap.nr_map; i++) {
  322. printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
  323. bfin_memmap.map[i].addr,
  324. bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
  325. switch (bfin_memmap.map[i].type) {
  326. case BFIN_MEMMAP_RAM:
  327. printk("(usable)\n");
  328. break;
  329. case BFIN_MEMMAP_RESERVED:
  330. printk("(reserved)\n");
  331. break;
  332. default: printk("type %lu\n", bfin_memmap.map[i].type);
  333. break;
  334. }
  335. }
  336. }
  337. static __init int parse_memmap(char *arg)
  338. {
  339. unsigned long long start_at, mem_size;
  340. if (!arg)
  341. return -EINVAL;
  342. mem_size = memparse(arg, &arg);
  343. if (*arg == '@') {
  344. start_at = memparse(arg+1, &arg);
  345. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
  346. } else if (*arg == '$') {
  347. start_at = memparse(arg+1, &arg);
  348. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
  349. }
  350. return 0;
  351. }
  352. /*
  353. * Initial parsing of the command line. Currently, we support:
  354. * - Controlling the linux memory size: mem=xxx[KMG]
  355. * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
  356. * $ -> reserved memory is dcacheable
  357. * # -> reserved memory is icacheable
  358. * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
  359. * @ from <start> to <start>+<mem>, type RAM
  360. * $ from <start> to <start>+<mem>, type RESERVED
  361. */
  362. static __init void parse_cmdline_early(char *cmdline_p)
  363. {
  364. char c = ' ', *to = cmdline_p;
  365. unsigned int memsize;
  366. for (;;) {
  367. if (c == ' ') {
  368. if (!memcmp(to, "mem=", 4)) {
  369. to += 4;
  370. memsize = memparse(to, &to);
  371. if (memsize)
  372. _ramend = memsize;
  373. } else if (!memcmp(to, "max_mem=", 8)) {
  374. to += 8;
  375. memsize = memparse(to, &to);
  376. if (memsize) {
  377. physical_mem_end = memsize;
  378. if (*to != ' ') {
  379. if (*to == '$'
  380. || *(to + 1) == '$')
  381. reserved_mem_dcache_on = 1;
  382. if (*to == '#'
  383. || *(to + 1) == '#')
  384. reserved_mem_icache_on = 1;
  385. }
  386. }
  387. } else if (!memcmp(to, "earlyprintk=", 12)) {
  388. to += 12;
  389. setup_early_printk(to);
  390. } else if (!memcmp(to, "memmap=", 7)) {
  391. to += 7;
  392. parse_memmap(to);
  393. }
  394. }
  395. c = *(to++);
  396. if (!c)
  397. break;
  398. }
  399. }
  400. /*
  401. * Setup memory defaults from user config.
  402. * The physical memory layout looks like:
  403. *
  404. * [_rambase, _ramstart]: kernel image
  405. * [memory_start, memory_end]: dynamic memory managed by kernel
  406. * [memory_end, _ramend]: reserved memory
  407. * [memory_mtd_start(memory_end),
  408. * memory_mtd_start + mtd_size]: rootfs (if any)
  409. * [_ramend - DMA_UNCACHED_REGION,
  410. * _ramend]: uncached DMA region
  411. * [_ramend, physical_mem_end]: memory not managed by kernel
  412. */
  413. static __init void memory_setup(void)
  414. {
  415. #ifdef CONFIG_MTD_UCLINUX
  416. unsigned long mtd_phys = 0;
  417. #endif
  418. _rambase = (unsigned long)_stext;
  419. _ramstart = (unsigned long)_end;
  420. if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
  421. console_init();
  422. panic("DMA region exceeds memory limit: %lu.\n",
  423. _ramend - _ramstart);
  424. }
  425. memory_end = _ramend - DMA_UNCACHED_REGION;
  426. #ifdef CONFIG_MPU
  427. /* Round up to multiple of 4MB */
  428. memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
  429. #else
  430. memory_start = PAGE_ALIGN(_ramstart);
  431. #endif
  432. #if defined(CONFIG_MTD_UCLINUX)
  433. /* generic memory mapped MTD driver */
  434. memory_mtd_end = memory_end;
  435. mtd_phys = _ramstart;
  436. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
  437. # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
  438. if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
  439. mtd_size =
  440. PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
  441. # endif
  442. # if defined(CONFIG_CRAMFS)
  443. if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
  444. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
  445. # endif
  446. # if defined(CONFIG_ROMFS_FS)
  447. if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
  448. && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
  449. mtd_size =
  450. PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
  451. # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  452. /* Due to a Hardware Anomaly we need to limit the size of usable
  453. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  454. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  455. */
  456. # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  457. if (memory_end >= 56 * 1024 * 1024)
  458. memory_end = 56 * 1024 * 1024;
  459. # else
  460. if (memory_end >= 60 * 1024 * 1024)
  461. memory_end = 60 * 1024 * 1024;
  462. # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  463. # endif /* ANOMALY_05000263 */
  464. # endif /* CONFIG_ROMFS_FS */
  465. memory_end -= mtd_size;
  466. if (mtd_size == 0) {
  467. console_init();
  468. panic("Don't boot kernel without rootfs attached.\n");
  469. }
  470. /* Relocate MTD image to the top of memory after the uncached memory area */
  471. dma_memcpy((char *)memory_end, _end, mtd_size);
  472. memory_mtd_start = memory_end;
  473. _ebss = memory_mtd_start; /* define _ebss for compatible */
  474. #endif /* CONFIG_MTD_UCLINUX */
  475. #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  476. /* Due to a Hardware Anomaly we need to limit the size of usable
  477. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  478. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  479. */
  480. #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  481. if (memory_end >= 56 * 1024 * 1024)
  482. memory_end = 56 * 1024 * 1024;
  483. #else
  484. if (memory_end >= 60 * 1024 * 1024)
  485. memory_end = 60 * 1024 * 1024;
  486. #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  487. printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
  488. #endif /* ANOMALY_05000263 */
  489. #ifdef CONFIG_MPU
  490. page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
  491. page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
  492. #endif
  493. #if !defined(CONFIG_MTD_UCLINUX)
  494. /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
  495. memory_end -= SIZE_4K;
  496. #endif
  497. init_mm.start_code = (unsigned long)_stext;
  498. init_mm.end_code = (unsigned long)_etext;
  499. init_mm.end_data = (unsigned long)_edata;
  500. init_mm.brk = (unsigned long)0;
  501. printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
  502. printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
  503. printk(KERN_INFO "Memory map:\n"
  504. KERN_INFO " fixedcode = 0x%p-0x%p\n"
  505. KERN_INFO " text = 0x%p-0x%p\n"
  506. KERN_INFO " rodata = 0x%p-0x%p\n"
  507. KERN_INFO " bss = 0x%p-0x%p\n"
  508. KERN_INFO " data = 0x%p-0x%p\n"
  509. KERN_INFO " stack = 0x%p-0x%p\n"
  510. KERN_INFO " init = 0x%p-0x%p\n"
  511. KERN_INFO " available = 0x%p-0x%p\n"
  512. #ifdef CONFIG_MTD_UCLINUX
  513. KERN_INFO " rootfs = 0x%p-0x%p\n"
  514. #endif
  515. #if DMA_UNCACHED_REGION > 0
  516. KERN_INFO " DMA Zone = 0x%p-0x%p\n"
  517. #endif
  518. , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
  519. _stext, _etext,
  520. __start_rodata, __end_rodata,
  521. __bss_start, __bss_stop,
  522. _sdata, _edata,
  523. (void *)&init_thread_union,
  524. (void *)((int)(&init_thread_union) + 0x2000),
  525. __init_begin, __init_end,
  526. (void *)_ramstart, (void *)memory_end
  527. #ifdef CONFIG_MTD_UCLINUX
  528. , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
  529. #endif
  530. #if DMA_UNCACHED_REGION > 0
  531. , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
  532. #endif
  533. );
  534. }
  535. /*
  536. * Find the lowest, highest page frame number we have available
  537. */
  538. void __init find_min_max_pfn(void)
  539. {
  540. int i;
  541. max_pfn = 0;
  542. min_low_pfn = memory_end;
  543. for (i = 0; i < bfin_memmap.nr_map; i++) {
  544. unsigned long start, end;
  545. /* RAM? */
  546. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  547. continue;
  548. start = PFN_UP(bfin_memmap.map[i].addr);
  549. end = PFN_DOWN(bfin_memmap.map[i].addr +
  550. bfin_memmap.map[i].size);
  551. if (start >= end)
  552. continue;
  553. if (end > max_pfn)
  554. max_pfn = end;
  555. if (start < min_low_pfn)
  556. min_low_pfn = start;
  557. }
  558. }
  559. static __init void setup_bootmem_allocator(void)
  560. {
  561. int bootmap_size;
  562. int i;
  563. unsigned long start_pfn, end_pfn;
  564. unsigned long curr_pfn, last_pfn, size;
  565. /* mark memory between memory_start and memory_end usable */
  566. add_memory_region(memory_start,
  567. memory_end - memory_start, BFIN_MEMMAP_RAM);
  568. /* sanity check for overlap */
  569. sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
  570. print_memory_map("boot memmap");
  571. /* intialize globals in linux/bootmem.h */
  572. find_min_max_pfn();
  573. /* pfn of the last usable page frame */
  574. if (max_pfn > memory_end >> PAGE_SHIFT)
  575. max_pfn = memory_end >> PAGE_SHIFT;
  576. /* pfn of last page frame directly mapped by kernel */
  577. max_low_pfn = max_pfn;
  578. /* pfn of the first usable page frame after kernel image*/
  579. if (min_low_pfn < memory_start >> PAGE_SHIFT)
  580. min_low_pfn = memory_start >> PAGE_SHIFT;
  581. start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
  582. end_pfn = memory_end >> PAGE_SHIFT;
  583. /*
  584. * give all the memory to the bootmap allocator, tell it to put the
  585. * boot mem_map at the start of memory.
  586. */
  587. bootmap_size = init_bootmem_node(NODE_DATA(0),
  588. memory_start >> PAGE_SHIFT, /* map goes here */
  589. start_pfn, end_pfn);
  590. /* register the memmap regions with the bootmem allocator */
  591. for (i = 0; i < bfin_memmap.nr_map; i++) {
  592. /*
  593. * Reserve usable memory
  594. */
  595. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  596. continue;
  597. /*
  598. * We are rounding up the start address of usable memory:
  599. */
  600. curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
  601. if (curr_pfn >= end_pfn)
  602. continue;
  603. /*
  604. * ... and at the end of the usable range downwards:
  605. */
  606. last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
  607. bfin_memmap.map[i].size);
  608. if (last_pfn > end_pfn)
  609. last_pfn = end_pfn;
  610. /*
  611. * .. finally, did all the rounding and playing
  612. * around just make the area go away?
  613. */
  614. if (last_pfn <= curr_pfn)
  615. continue;
  616. size = last_pfn - curr_pfn;
  617. free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
  618. }
  619. /* reserve memory before memory_start, including bootmap */
  620. reserve_bootmem(PAGE_OFFSET,
  621. memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
  622. BOOTMEM_DEFAULT);
  623. }
  624. #define EBSZ_TO_MEG(ebsz) \
  625. ({ \
  626. int meg = 0; \
  627. switch (ebsz & 0xf) { \
  628. case 0x1: meg = 16; break; \
  629. case 0x3: meg = 32; break; \
  630. case 0x5: meg = 64; break; \
  631. case 0x7: meg = 128; break; \
  632. case 0x9: meg = 256; break; \
  633. case 0xb: meg = 512; break; \
  634. } \
  635. meg; \
  636. })
  637. static inline int __init get_mem_size(void)
  638. {
  639. #if defined(EBIU_SDBCTL)
  640. # if defined(BF561_FAMILY)
  641. int ret = 0;
  642. u32 sdbctl = bfin_read_EBIU_SDBCTL();
  643. ret += EBSZ_TO_MEG(sdbctl >> 0);
  644. ret += EBSZ_TO_MEG(sdbctl >> 8);
  645. ret += EBSZ_TO_MEG(sdbctl >> 16);
  646. ret += EBSZ_TO_MEG(sdbctl >> 24);
  647. return ret;
  648. # else
  649. return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
  650. # endif
  651. #elif defined(EBIU_DDRCTL1)
  652. u32 ddrctl = bfin_read_EBIU_DDRCTL1();
  653. int ret = 0;
  654. switch (ddrctl & 0xc0000) {
  655. case DEVSZ_64: ret = 64 / 8;
  656. case DEVSZ_128: ret = 128 / 8;
  657. case DEVSZ_256: ret = 256 / 8;
  658. case DEVSZ_512: ret = 512 / 8;
  659. }
  660. switch (ddrctl & 0x30000) {
  661. case DEVWD_4: ret *= 2;
  662. case DEVWD_8: ret *= 2;
  663. case DEVWD_16: break;
  664. }
  665. if ((ddrctl & 0xc000) == 0x4000)
  666. ret *= 2;
  667. return ret;
  668. #endif
  669. BUG();
  670. }
  671. void __init setup_arch(char **cmdline_p)
  672. {
  673. unsigned long sclk, cclk;
  674. #ifdef CONFIG_DUMMY_CONSOLE
  675. conswitchp = &dummy_con;
  676. #endif
  677. #if defined(CONFIG_CMDLINE_BOOL)
  678. strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
  679. command_line[sizeof(command_line) - 1] = 0;
  680. #endif
  681. /* Keep a copy of command line */
  682. *cmdline_p = &command_line[0];
  683. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  684. boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
  685. /* setup memory defaults from the user config */
  686. physical_mem_end = 0;
  687. _ramend = get_mem_size() * 1024 * 1024;
  688. memset(&bfin_memmap, 0, sizeof(bfin_memmap));
  689. parse_cmdline_early(&command_line[0]);
  690. if (physical_mem_end == 0)
  691. physical_mem_end = _ramend;
  692. memory_setup();
  693. /* Initialize Async memory banks */
  694. bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
  695. bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
  696. bfin_write_EBIU_AMGCTL(AMGCTLVAL);
  697. #ifdef CONFIG_EBIU_MBSCTLVAL
  698. bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
  699. bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
  700. bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
  701. #endif
  702. cclk = get_cclk();
  703. sclk = get_sclk();
  704. #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
  705. if (ANOMALY_05000273 && cclk == sclk)
  706. panic("ANOMALY 05000273, SCLK can not be same as CCLK");
  707. #endif
  708. #ifdef BF561_FAMILY
  709. if (ANOMALY_05000266) {
  710. bfin_read_IMDMA_D0_IRQ_STATUS();
  711. bfin_read_IMDMA_D1_IRQ_STATUS();
  712. }
  713. #endif
  714. printk(KERN_INFO "Hardware Trace ");
  715. if (bfin_read_TBUFCTL() & 0x1)
  716. printk("Active ");
  717. else
  718. printk("Off ");
  719. if (bfin_read_TBUFCTL() & 0x2)
  720. printk("and Enabled\n");
  721. else
  722. printk("and Disabled\n");
  723. #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
  724. /* we need to initialize the Flashrom device here since we might
  725. * do things with flash early on in the boot
  726. */
  727. flash_probe();
  728. #endif
  729. _bfin_swrst = bfin_read_SWRST();
  730. #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
  731. bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
  732. #endif
  733. #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
  734. bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
  735. #endif
  736. #ifdef CONFIG_SMP
  737. if (_bfin_swrst & SWRST_DBL_FAULT_A) {
  738. #else
  739. if (_bfin_swrst & RESET_DOUBLE) {
  740. #endif
  741. printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
  742. #ifdef CONFIG_DEBUG_DOUBLEFAULT
  743. /* We assume the crashing kernel, and the current symbol table match */
  744. printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
  745. (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
  746. printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
  747. printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
  748. #endif
  749. printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
  750. init_retx);
  751. } else if (_bfin_swrst & RESET_WDOG)
  752. printk(KERN_INFO "Recovering from Watchdog event\n");
  753. else if (_bfin_swrst & RESET_SOFTWARE)
  754. printk(KERN_NOTICE "Reset caused by Software reset\n");
  755. printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
  756. if (bfin_compiled_revid() == 0xffff)
  757. printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
  758. else if (bfin_compiled_revid() == -1)
  759. printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
  760. else
  761. printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
  762. if (unlikely(CPUID != bfin_cpuid()))
  763. printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
  764. CPU, bfin_cpuid(), bfin_revid());
  765. else {
  766. if (bfin_revid() != bfin_compiled_revid()) {
  767. if (bfin_compiled_revid() == -1)
  768. printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
  769. bfin_revid());
  770. else if (bfin_compiled_revid() != 0xffff)
  771. printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
  772. bfin_compiled_revid(), bfin_revid());
  773. }
  774. if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
  775. printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
  776. CPU, bfin_revid());
  777. }
  778. printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
  779. printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
  780. cclk / 1000000, sclk / 1000000);
  781. if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
  782. printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
  783. setup_bootmem_allocator();
  784. paging_init();
  785. /* Copy atomic sequences to their fixed location, and sanity check that
  786. these locations are the ones that we advertise to userspace. */
  787. memcpy((void *)FIXED_CODE_START, &fixed_code_start,
  788. FIXED_CODE_END - FIXED_CODE_START);
  789. BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
  790. != SIGRETURN_STUB - FIXED_CODE_START);
  791. BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
  792. != ATOMIC_XCHG32 - FIXED_CODE_START);
  793. BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
  794. != ATOMIC_CAS32 - FIXED_CODE_START);
  795. BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
  796. != ATOMIC_ADD32 - FIXED_CODE_START);
  797. BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
  798. != ATOMIC_SUB32 - FIXED_CODE_START);
  799. BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
  800. != ATOMIC_IOR32 - FIXED_CODE_START);
  801. BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
  802. != ATOMIC_AND32 - FIXED_CODE_START);
  803. BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
  804. != ATOMIC_XOR32 - FIXED_CODE_START);
  805. BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
  806. != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
  807. #ifdef CONFIG_SMP
  808. platform_init_cpus();
  809. #endif
  810. init_exception_vectors();
  811. bfin_cache_init(); /* Initialize caches for the boot CPU */
  812. }
  813. static int __init topology_init(void)
  814. {
  815. unsigned int cpu;
  816. /* Record CPU-private information for the boot processor. */
  817. bfin_setup_cpudata(0);
  818. for_each_possible_cpu(cpu) {
  819. register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
  820. }
  821. return 0;
  822. }
  823. subsys_initcall(topology_init);
  824. /* Get the voltage input multiplier */
  825. static u_long cached_vco_pll_ctl, cached_vco;
  826. static u_long get_vco(void)
  827. {
  828. u_long msel;
  829. u_long pll_ctl = bfin_read_PLL_CTL();
  830. if (pll_ctl == cached_vco_pll_ctl)
  831. return cached_vco;
  832. else
  833. cached_vco_pll_ctl = pll_ctl;
  834. msel = (pll_ctl >> 9) & 0x3F;
  835. if (0 == msel)
  836. msel = 64;
  837. cached_vco = CONFIG_CLKIN_HZ;
  838. cached_vco >>= (1 & pll_ctl); /* DF bit */
  839. cached_vco *= msel;
  840. return cached_vco;
  841. }
  842. /* Get the Core clock */
  843. static u_long cached_cclk_pll_div, cached_cclk;
  844. u_long get_cclk(void)
  845. {
  846. u_long csel, ssel;
  847. if (bfin_read_PLL_STAT() & 0x1)
  848. return CONFIG_CLKIN_HZ;
  849. ssel = bfin_read_PLL_DIV();
  850. if (ssel == cached_cclk_pll_div)
  851. return cached_cclk;
  852. else
  853. cached_cclk_pll_div = ssel;
  854. csel = ((ssel >> 4) & 0x03);
  855. ssel &= 0xf;
  856. if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
  857. cached_cclk = get_vco() / ssel;
  858. else
  859. cached_cclk = get_vco() >> csel;
  860. return cached_cclk;
  861. }
  862. EXPORT_SYMBOL(get_cclk);
  863. /* Get the System clock */
  864. static u_long cached_sclk_pll_div, cached_sclk;
  865. u_long get_sclk(void)
  866. {
  867. u_long ssel;
  868. if (bfin_read_PLL_STAT() & 0x1)
  869. return CONFIG_CLKIN_HZ;
  870. ssel = bfin_read_PLL_DIV();
  871. if (ssel == cached_sclk_pll_div)
  872. return cached_sclk;
  873. else
  874. cached_sclk_pll_div = ssel;
  875. ssel &= 0xf;
  876. if (0 == ssel) {
  877. printk(KERN_WARNING "Invalid System Clock\n");
  878. ssel = 1;
  879. }
  880. cached_sclk = get_vco() / ssel;
  881. return cached_sclk;
  882. }
  883. EXPORT_SYMBOL(get_sclk);
  884. unsigned long sclk_to_usecs(unsigned long sclk)
  885. {
  886. u64 tmp = USEC_PER_SEC * (u64)sclk;
  887. do_div(tmp, get_sclk());
  888. return tmp;
  889. }
  890. EXPORT_SYMBOL(sclk_to_usecs);
  891. unsigned long usecs_to_sclk(unsigned long usecs)
  892. {
  893. u64 tmp = get_sclk() * (u64)usecs;
  894. do_div(tmp, USEC_PER_SEC);
  895. return tmp;
  896. }
  897. EXPORT_SYMBOL(usecs_to_sclk);
  898. /*
  899. * Get CPU information for use by the procfs.
  900. */
  901. static int show_cpuinfo(struct seq_file *m, void *v)
  902. {
  903. char *cpu, *mmu, *fpu, *vendor, *cache;
  904. uint32_t revid;
  905. int cpu_num = *(unsigned int *)v;
  906. u_long sclk, cclk;
  907. u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
  908. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
  909. cpu = CPU;
  910. mmu = "none";
  911. fpu = "none";
  912. revid = bfin_revid();
  913. sclk = get_sclk();
  914. cclk = get_cclk();
  915. switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
  916. case 0xca:
  917. vendor = "Analog Devices";
  918. break;
  919. default:
  920. vendor = "unknown";
  921. break;
  922. }
  923. seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
  924. if (CPUID == bfin_cpuid())
  925. seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
  926. else
  927. seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
  928. CPUID, bfin_cpuid());
  929. seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
  930. "stepping\t: %d\n",
  931. cpu, cclk/1000000, sclk/1000000,
  932. #ifdef CONFIG_MPU
  933. "mpu on",
  934. #else
  935. "mpu off",
  936. #endif
  937. revid);
  938. seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
  939. cclk/1000000, cclk%1000000,
  940. sclk/1000000, sclk%1000000);
  941. seq_printf(m, "bogomips\t: %lu.%02lu\n"
  942. "Calibration\t: %lu loops\n",
  943. (cpudata->loops_per_jiffy * HZ) / 500000,
  944. ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
  945. (cpudata->loops_per_jiffy * HZ));
  946. /* Check Cache configutation */
  947. switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
  948. case ACACHE_BSRAM:
  949. cache = "dbank-A/B\t: cache/sram";
  950. dcache_size = 16;
  951. dsup_banks = 1;
  952. break;
  953. case ACACHE_BCACHE:
  954. cache = "dbank-A/B\t: cache/cache";
  955. dcache_size = 32;
  956. dsup_banks = 2;
  957. break;
  958. case ASRAM_BSRAM:
  959. cache = "dbank-A/B\t: sram/sram";
  960. dcache_size = 0;
  961. dsup_banks = 0;
  962. break;
  963. default:
  964. cache = "unknown";
  965. dcache_size = 0;
  966. dsup_banks = 0;
  967. break;
  968. }
  969. /* Is it turned on? */
  970. if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
  971. dcache_size = 0;
  972. if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
  973. icache_size = 0;
  974. seq_printf(m, "cache size\t: %d KB(L1 icache) "
  975. "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
  976. icache_size, dcache_size,
  977. #if defined CONFIG_BFIN_WB
  978. "wb"
  979. #elif defined CONFIG_BFIN_WT
  980. "wt"
  981. #endif
  982. "", 0);
  983. seq_printf(m, "%s\n", cache);
  984. if (icache_size)
  985. seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
  986. BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
  987. else
  988. seq_printf(m, "icache setup\t: off\n");
  989. seq_printf(m,
  990. "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
  991. dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
  992. BFIN_DLINES);
  993. #ifdef __ARCH_SYNC_CORE_DCACHE
  994. seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
  995. #endif
  996. #ifdef CONFIG_BFIN_ICACHE_LOCK
  997. switch ((cpudata->imemctl >> 3) & WAYALL_L) {
  998. case WAY0_L:
  999. seq_printf(m, "Way0 Locked-Down\n");
  1000. break;
  1001. case WAY1_L:
  1002. seq_printf(m, "Way1 Locked-Down\n");
  1003. break;
  1004. case WAY01_L:
  1005. seq_printf(m, "Way0,Way1 Locked-Down\n");
  1006. break;
  1007. case WAY2_L:
  1008. seq_printf(m, "Way2 Locked-Down\n");
  1009. break;
  1010. case WAY02_L:
  1011. seq_printf(m, "Way0,Way2 Locked-Down\n");
  1012. break;
  1013. case WAY12_L:
  1014. seq_printf(m, "Way1,Way2 Locked-Down\n");
  1015. break;
  1016. case WAY012_L:
  1017. seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
  1018. break;
  1019. case WAY3_L:
  1020. seq_printf(m, "Way3 Locked-Down\n");
  1021. break;
  1022. case WAY03_L:
  1023. seq_printf(m, "Way0,Way3 Locked-Down\n");
  1024. break;
  1025. case WAY13_L:
  1026. seq_printf(m, "Way1,Way3 Locked-Down\n");
  1027. break;
  1028. case WAY013_L:
  1029. seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
  1030. break;
  1031. case WAY32_L:
  1032. seq_printf(m, "Way3,Way2 Locked-Down\n");
  1033. break;
  1034. case WAY320_L:
  1035. seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
  1036. break;
  1037. case WAY321_L:
  1038. seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
  1039. break;
  1040. case WAYALL_L:
  1041. seq_printf(m, "All Ways are locked\n");
  1042. break;
  1043. default:
  1044. seq_printf(m, "No Ways are locked\n");
  1045. }
  1046. #endif
  1047. if (cpu_num != num_possible_cpus() - 1)
  1048. return 0;
  1049. if (L2_LENGTH)
  1050. seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
  1051. seq_printf(m, "board name\t: %s\n", bfin_board_name);
  1052. seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
  1053. physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
  1054. seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
  1055. ((int)memory_end - (int)_stext) >> 10,
  1056. _stext,
  1057. (void *)memory_end);
  1058. seq_printf(m, "\n");
  1059. return 0;
  1060. }
  1061. static void *c_start(struct seq_file *m, loff_t *pos)
  1062. {
  1063. if (*pos == 0)
  1064. *pos = first_cpu(cpu_online_map);
  1065. if (*pos >= num_online_cpus())
  1066. return NULL;
  1067. return pos;
  1068. }
  1069. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  1070. {
  1071. *pos = next_cpu(*pos, cpu_online_map);
  1072. return c_start(m, pos);
  1073. }
  1074. static void c_stop(struct seq_file *m, void *v)
  1075. {
  1076. }
  1077. const struct seq_operations cpuinfo_op = {
  1078. .start = c_start,
  1079. .next = c_next,
  1080. .stop = c_stop,
  1081. .show = show_cpuinfo,
  1082. };
  1083. void __init cmdline_init(const char *r0)
  1084. {
  1085. if (r0)
  1086. strncpy(command_line, r0, COMMAND_LINE_SIZE);
  1087. }