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@@ -735,32 +735,6 @@ static int handshake(void __iomem *ptr, u32 mask, u32 done,
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return -ETIMEDOUT;
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}
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-#define PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI 0x8C31
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-#define PCI_DEVICE_ID_INTEL_LYNX_POINT_LP_XHCI 0x9C31
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-
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-bool usb_is_intel_ppt_switchable_xhci(struct pci_dev *pdev)
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-{
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- return pdev->class == PCI_CLASS_SERIAL_USB_XHCI &&
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- pdev->vendor == PCI_VENDOR_ID_INTEL &&
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- pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI;
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-}
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-
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-/* The Intel Lynx Point chipset also has switchable ports. */
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-bool usb_is_intel_lpt_switchable_xhci(struct pci_dev *pdev)
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-{
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- return pdev->class == PCI_CLASS_SERIAL_USB_XHCI &&
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- pdev->vendor == PCI_VENDOR_ID_INTEL &&
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- (pdev->device == PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI ||
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- pdev->device == PCI_DEVICE_ID_INTEL_LYNX_POINT_LP_XHCI);
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-}
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-
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-bool usb_is_intel_switchable_xhci(struct pci_dev *pdev)
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-{
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- return usb_is_intel_ppt_switchable_xhci(pdev) ||
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- usb_is_intel_lpt_switchable_xhci(pdev);
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-}
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-EXPORT_SYMBOL_GPL(usb_is_intel_switchable_xhci);
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-
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/*
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* Intel's Panther Point chipset has two host controllers (EHCI and xHCI) that
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* share some number of ports. These ports can be switched between either
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@@ -779,9 +753,23 @@ EXPORT_SYMBOL_GPL(usb_is_intel_switchable_xhci);
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* terminations before switching the USB 2.0 wires over, so that USB 3.0
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* devices connect at SuperSpeed, rather than at USB 2.0 speeds.
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*/
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-void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
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+void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
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{
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u32 ports_available;
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+ bool ehci_found = false;
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+ struct pci_dev *companion = NULL;
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+
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+ /* make sure an intel EHCI controller exists */
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+ for_each_pci_dev(companion) {
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+ if (companion->class == PCI_CLASS_SERIAL_USB_EHCI &&
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+ companion->vendor == PCI_VENDOR_ID_INTEL) {
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+ ehci_found = true;
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+ break;
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+ }
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+ }
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+
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+ if (!ehci_found)
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+ return;
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/* Don't switchover the ports if the user hasn't compiled the xHCI
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* driver. Otherwise they will see "dead" USB ports that don't power
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@@ -840,7 +828,7 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
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dev_dbg(&xhci_pdev->dev, "USB 2.0 ports that are now switched over "
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"to xHCI: 0x%x\n", ports_available);
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}
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-EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
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+EXPORT_SYMBOL_GPL(usb_enable_intel_xhci_ports);
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void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
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{
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@@ -921,8 +909,8 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
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writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
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hc_init:
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- if (usb_is_intel_switchable_xhci(pdev))
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- usb_enable_xhci_ports(pdev);
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+ if (pdev->vendor == PCI_VENDOR_ID_INTEL)
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+ usb_enable_intel_xhci_ports(pdev);
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op_reg_base = base + XHCI_HC_LENGTH(readl(base));
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