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@@ -45,65 +45,6 @@
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#define OCP_STATUS_REQ_FAILED 0x20000
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#define OCP_STATUS_RESP_ERROR 0x30000
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-struct wl1271_partition_set wl12xx_part_table[PART_TABLE_LEN] = {
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- [PART_DOWN] = {
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- .mem = {
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- .start = 0x00000000,
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- .size = 0x000177c0
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- },
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- .reg = {
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- .start = REGISTERS_BASE,
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- .size = 0x00008800
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- },
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- .mem2 = {
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- .start = 0x00000000,
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- .size = 0x00000000
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- },
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- .mem3 = {
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- .start = 0x00000000,
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- .size = 0x00000000
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- },
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- },
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-
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- [PART_WORK] = {
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- .mem = {
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- .start = 0x00040000,
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- .size = 0x00014fc0
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- },
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- .reg = {
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- .start = REGISTERS_BASE,
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- .size = 0x0000a000
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- },
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- .mem2 = {
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- .start = 0x003004f8,
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- .size = 0x00000004
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- },
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- .mem3 = {
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- .start = 0x00040404,
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- .size = 0x00000000
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- },
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- },
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-
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- [PART_DRPW] = {
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- .mem = {
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- .start = 0x00040000,
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- .size = 0x00014fc0
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- },
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- .reg = {
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- .start = DRPW_BASE,
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- .size = 0x00006000
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- },
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- .mem2 = {
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- .start = 0x00000000,
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- .size = 0x00000000
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- },
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- .mem3 = {
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- .start = 0x00000000,
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- .size = 0x00000000
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- }
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- }
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-};
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-
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bool wl1271_set_block_size(struct wl1271 *wl)
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{
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if (wl->if_ops->set_block_size) {
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@@ -124,7 +65,41 @@ void wl1271_enable_interrupts(struct wl1271 *wl)
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enable_irq(wl->irq);
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}
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-/* Set the SPI partitions to access the chip addresses
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+int wlcore_translate_addr(struct wl1271 *wl, int addr)
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+{
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+ struct wlcore_partition_set *part = &wl->curr_part;
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+
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+ /*
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+ * To translate, first check to which window of addresses the
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+ * particular address belongs. Then subtract the starting address
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+ * of that window from the address. Then, add offset of the
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+ * translated region.
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+ *
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+ * The translated regions occur next to each other in physical device
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+ * memory, so just add the sizes of the preceding address regions to
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+ * get the offset to the new region.
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+ */
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+ if ((addr >= part->mem.start) &&
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+ (addr < part->mem.start + part->mem.size))
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+ return addr - part->mem.start;
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+ else if ((addr >= part->reg.start) &&
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+ (addr < part->reg.start + part->reg.size))
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+ return addr - part->reg.start + part->mem.size;
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+ else if ((addr >= part->mem2.start) &&
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+ (addr < part->mem2.start + part->mem2.size))
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+ return addr - part->mem2.start + part->mem.size +
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+ part->reg.size;
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+ else if ((addr >= part->mem3.start) &&
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+ (addr < part->mem3.start + part->mem3.size))
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+ return addr - part->mem3.start + part->mem.size +
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+ part->reg.size + part->mem2.size;
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+
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+ WARN(1, "HW address 0x%x out of range", addr);
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(wlcore_translate_addr);
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+
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+/* Set the partitions to access the chip addresses
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*
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* To simplify driver code, a fixed (virtual) memory map is defined for
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* register and memory addresses. Because in the chipset, in different stages
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@@ -158,33 +133,43 @@ void wl1271_enable_interrupts(struct wl1271 *wl)
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* | |
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*
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*/
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-int wl1271_set_partition(struct wl1271 *wl,
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- struct wl1271_partition_set *p)
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+void wlcore_set_partition(struct wl1271 *wl,
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+ const struct wlcore_partition_set *p)
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{
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/* copy partition info */
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- memcpy(&wl->part, p, sizeof(*p));
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+ memcpy(&wl->curr_part, p, sizeof(*p));
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- wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
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+ wl1271_debug(DEBUG_IO, "mem_start %08X mem_size %08X",
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p->mem.start, p->mem.size);
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- wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
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+ wl1271_debug(DEBUG_IO, "reg_start %08X reg_size %08X",
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p->reg.start, p->reg.size);
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- wl1271_debug(DEBUG_SPI, "mem2_start %08X mem2_size %08X",
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+ wl1271_debug(DEBUG_IO, "mem2_start %08X mem2_size %08X",
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p->mem2.start, p->mem2.size);
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- wl1271_debug(DEBUG_SPI, "mem3_start %08X mem3_size %08X",
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+ wl1271_debug(DEBUG_IO, "mem3_start %08X mem3_size %08X",
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p->mem3.start, p->mem3.size);
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- /* write partition info to the chipset */
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wl1271_raw_write32(wl, HW_PART0_START_ADDR, p->mem.start);
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wl1271_raw_write32(wl, HW_PART0_SIZE_ADDR, p->mem.size);
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wl1271_raw_write32(wl, HW_PART1_START_ADDR, p->reg.start);
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wl1271_raw_write32(wl, HW_PART1_SIZE_ADDR, p->reg.size);
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wl1271_raw_write32(wl, HW_PART2_START_ADDR, p->mem2.start);
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wl1271_raw_write32(wl, HW_PART2_SIZE_ADDR, p->mem2.size);
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+ /*
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+ * We don't need the size of the last partition, as it is
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+ * automatically calculated based on the total memory size and
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+ * the sizes of the previous partitions.
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+ */
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wl1271_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start);
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+}
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+EXPORT_SYMBOL_GPL(wlcore_set_partition);
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- return 0;
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+void wlcore_select_partition(struct wl1271 *wl, u8 part)
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+{
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+ wl1271_debug(DEBUG_IO, "setting partition %d", part);
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+
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+ wlcore_set_partition(wl, &wl->ptable[part]);
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}
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-EXPORT_SYMBOL_GPL(wl1271_set_partition);
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+EXPORT_SYMBOL_GPL(wlcore_select_partition);
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void wl1271_io_reset(struct wl1271 *wl)
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{
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@@ -241,4 +226,3 @@ u16 wl1271_top_reg_read(struct wl1271 *wl, int addr)
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return 0xffff;
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}
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}
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-
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Luciano Coelho