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@@ -404,7 +404,6 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
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#define IDE_WAKEUP_DELAY (1*HZ)
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static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *);
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-static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
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static void pmac_ide_selectproc(ide_drive_t *drive);
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static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
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@@ -1422,8 +1421,7 @@ out:
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* pmac_ide_build_dmatable builds the DBDMA command list
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* for a transfer and sets the DBDMA channel to point to it.
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*/
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-static int
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-pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
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+static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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pmac_ide_hwif_t *pmif =
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@@ -1431,8 +1429,8 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
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struct dbdma_cmd *table;
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volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
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struct scatterlist *sg;
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- int wr = (rq_data_dir(rq) == WRITE);
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- int i = hwif->cmd.sg_nents, count = 0;
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+ int wr = !!(cmd->tf_flags & IDE_TFLAG_WRITE);
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+ int i = cmd->sg_nents, count = 0;
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/* DMA table is already aligned */
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table = (struct dbdma_cmd *) pmif->dma_table_cpu;
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@@ -1504,23 +1502,22 @@ use_pio_instead:
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* Prepare a DMA transfer. We build the DMA table, adjust the timings for
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* a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
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*/
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-static int
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-pmac_ide_dma_setup(ide_drive_t *drive)
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+static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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pmac_ide_hwif_t *pmif =
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(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
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- struct request *rq = hwif->rq;
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u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4);
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+ u8 write = !!(cmd->tf_flags & IDE_TFLAG_WRITE);
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- if (!pmac_ide_build_dmatable(drive, rq)) {
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- ide_map_sg(drive, rq);
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+ if (pmac_ide_build_dmatable(drive, cmd) == 0) {
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+ ide_map_sg(drive, cmd);
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return 1;
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}
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/* Apple adds 60ns to wrDataSetup on reads */
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if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {
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- writel(pmif->timings[unit] + (!rq_data_dir(rq) ? 0x00800000UL : 0),
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+ writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL),
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PMAC_IDE_REG(IDE_TIMING_CONFIG));
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(void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
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}
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