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@@ -198,7 +198,7 @@ static bool _rtl_pci_platform_switch_device_pci_aspm(
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}
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}
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/*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
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/*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
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-static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
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+static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
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{
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{
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struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
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struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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@@ -207,8 +207,6 @@ static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
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if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
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if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
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udelay(100);
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udelay(100);
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-
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- return true;
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}
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}
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/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
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/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
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