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@@ -181,6 +181,22 @@
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#define BCMA_CC_FLASH_CFG 0x0128
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#define BCMA_CC_FLASH_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */
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#define BCMA_CC_FLASH_WAITCNT 0x012C
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+#define BCMA_CC_SROM_CONTROL 0x0190
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+#define BCMA_CC_SROM_CONTROL_START 0x80000000
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+#define BCMA_CC_SROM_CONTROL_BUSY 0x80000000
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+#define BCMA_CC_SROM_CONTROL_OPCODE 0x60000000
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+#define BCMA_CC_SROM_CONTROL_OP_READ 0x00000000
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+#define BCMA_CC_SROM_CONTROL_OP_WRITE 0x20000000
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+#define BCMA_CC_SROM_CONTROL_OP_WRDIS 0x40000000
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+#define BCMA_CC_SROM_CONTROL_OP_WREN 0x60000000
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+#define BCMA_CC_SROM_CONTROL_OTPSEL 0x00000010
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+#define BCMA_CC_SROM_CONTROL_LOCK 0x00000008
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+#define BCMA_CC_SROM_CONTROL_SIZE_MASK 0x00000006
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+#define BCMA_CC_SROM_CONTROL_SIZE_1K 0x00000000
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+#define BCMA_CC_SROM_CONTROL_SIZE_4K 0x00000002
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+#define BCMA_CC_SROM_CONTROL_SIZE_16K 0x00000004
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+#define BCMA_CC_SROM_CONTROL_SIZE_SHIFT 1
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+#define BCMA_CC_SROM_CONTROL_PRESENT 0x00000001
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/* 0x1E0 is defined as shared BCMA_CLKCTLST */
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#define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
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#define BCMA_CC_UART0_DATA 0x0300
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