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@@ -10,8 +10,9 @@
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* published by the Free Software Foundation.
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*/
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-#ifndef __MACH_IOMMU_H
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-#define __MACH_IOMMU_H
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+#if defined(CONFIG_ARCH_OMAP1)
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+#error "iommu for this processor not implemented yet"
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+#endif
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struct iotlb_entry {
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u32 da;
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@@ -71,11 +72,6 @@ struct cr_regs {
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};
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};
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-struct iotlb_lock {
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- short base;
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- short vict;
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-};
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-
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/* architecture specific functions */
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struct iommu_functions {
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unsigned long version;
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@@ -103,42 +99,6 @@ struct iommu_functions {
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ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
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};
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-/**
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- * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
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- * @da_start: device address where the va space starts.
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- * @da_end: device address where the va space ends.
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- * @nr_tlb_entries: number of entries supported by the translation
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- * look-aside buffer (TLB).
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- */
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-struct omap_mmu_dev_attr {
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- u32 da_start;
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- u32 da_end;
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- int nr_tlb_entries;
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-};
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-
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-struct iommu_platform_data {
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- const char *name;
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- const char *clk_name;
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- const int nr_tlb_entries;
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- u32 da_start;
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- u32 da_end;
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-};
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-
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-/**
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- * struct iommu_arch_data - omap iommu private data
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- * @name: name of the iommu device
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- * @iommu_dev: handle of the iommu device
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- *
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- * This is an omap iommu private data object, which binds an iommu user
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- * to its iommu device. This object should be placed at the iommu user's
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- * dev_archdata so generic IOMMU API can be used without having to
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- * utilize omap-specific plumbing anymore.
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- */
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-struct omap_iommu_arch_data {
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- const char *name;
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- struct omap_iommu *iommu_dev;
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-};
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-
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#ifdef CONFIG_IOMMU_API
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/**
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* dev_to_omap_iommu() - retrieves an omap iommu object from a user device
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@@ -152,18 +112,59 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
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}
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#endif
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-/* IOMMU errors */
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-#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
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-#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
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-#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
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-#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
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-#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
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+/*
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+ * MMU Register offsets
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+ */
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+#define MMU_REVISION 0x00
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+#define MMU_SYSCONFIG 0x10
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+#define MMU_SYSSTATUS 0x14
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+#define MMU_IRQSTATUS 0x18
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+#define MMU_IRQENABLE 0x1c
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+#define MMU_WALKING_ST 0x40
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+#define MMU_CNTL 0x44
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+#define MMU_FAULT_AD 0x48
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+#define MMU_TTB 0x4c
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+#define MMU_LOCK 0x50
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+#define MMU_LD_TLB 0x54
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+#define MMU_CAM 0x58
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+#define MMU_RAM 0x5c
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+#define MMU_GFLUSH 0x60
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+#define MMU_FLUSH_ENTRY 0x64
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+#define MMU_READ_CAM 0x68
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+#define MMU_READ_RAM 0x6c
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+#define MMU_EMU_FAULT_AD 0x70
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+
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+#define MMU_REG_SIZE 256
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-#if defined(CONFIG_ARCH_OMAP1)
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-#error "iommu for this processor not implemented yet"
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-#else
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-#include <plat/iommu2.h>
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-#endif
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+/*
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+ * MMU Register bit definitions
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+ */
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+#define MMU_CAM_VATAG_SHIFT 12
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+#define MMU_CAM_VATAG_MASK \
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+ ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
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+#define MMU_CAM_P (1 << 3)
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+#define MMU_CAM_V (1 << 2)
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+#define MMU_CAM_PGSZ_MASK 3
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+#define MMU_CAM_PGSZ_1M (0 << 0)
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+#define MMU_CAM_PGSZ_64K (1 << 0)
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+#define MMU_CAM_PGSZ_4K (2 << 0)
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+#define MMU_CAM_PGSZ_16M (3 << 0)
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+
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+#define MMU_RAM_PADDR_SHIFT 12
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+#define MMU_RAM_PADDR_MASK \
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+ ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
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+
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+#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
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+#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
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+
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+#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
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+#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
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+#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
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+#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
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+#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
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+#define MMU_RAM_MIXED_SHIFT 6
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+#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
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+#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
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/*
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* utilities for super page(16MB, 1MB, 64KB and 4KB)
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@@ -199,23 +200,29 @@ extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
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extern int
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omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
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-extern int omap_iommu_set_isr(const char *name,
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- int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
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- void *priv),
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- void *isr_priv);
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-
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extern void omap_iommu_save_ctx(struct device *dev);
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extern void omap_iommu_restore_ctx(struct device *dev);
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-extern int omap_install_iommu_arch(const struct iommu_functions *ops);
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-extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
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-
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extern int omap_foreach_iommu_device(void *data,
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int (*fn)(struct device *, void *));
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+extern int omap_install_iommu_arch(const struct iommu_functions *ops);
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+extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
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+
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extern ssize_t
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omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
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extern size_t
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omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
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-#endif /* __MACH_IOMMU_H */
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+/*
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+ * register accessors
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+ */
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+static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
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+{
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+ return __raw_readl(obj->regbase + offs);
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+}
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+
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+static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
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+{
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+ __raw_writel(val, obj->regbase + offs);
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+}
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