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@@ -46,7 +46,7 @@
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/*
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* Set of msr bits that gdb can change on behalf of a process.
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*/
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-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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#define MSR_DEBUGCHANGE 0
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#else
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#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
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@@ -703,7 +703,7 @@ void user_enable_single_step(struct task_struct *task)
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL) {
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-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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task->thread.dbcr0 &= ~DBCR0_BT;
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task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
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regs->msr |= MSR_DE;
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@@ -720,7 +720,7 @@ void user_enable_block_step(struct task_struct *task)
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL) {
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-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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task->thread.dbcr0 &= ~DBCR0_IC;
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task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
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regs->msr |= MSR_DE;
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@@ -737,7 +737,7 @@ void user_disable_single_step(struct task_struct *task)
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL) {
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-#if defined(CONFIG_BOOKE)
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+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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/* If DAC don't clear DBCRO_IDM or MSR_DE */
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if (task->thread.dabr)
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task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT);
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@@ -745,9 +745,6 @@ void user_disable_single_step(struct task_struct *task)
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task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM);
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regs->msr &= ~MSR_DE;
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}
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-#elif defined(CONFIG_40x)
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- task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM);
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- regs->msr &= ~MSR_DE;
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#else
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regs->msr &= ~(MSR_SE | MSR_BE);
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#endif
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@@ -769,7 +766,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
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if ((data & ~0x7UL) >= TASK_SIZE)
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return -EIO;
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-#ifndef CONFIG_BOOKE
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+#ifndef CONFIG_PPC_ADV_DEBUG_REGS
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/* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
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* It was assumed, on previous implementations, that 3 bits were
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@@ -790,8 +787,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
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/* Move contents to the DABR register */
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task->thread.dabr = data;
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-#endif
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-#if defined(CONFIG_BOOKE)
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+#else /* CONFIG_PPC_ADV_DEBUG_REGS */
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/* As described above, it was assumed 3 bits were passed with the data
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* address, but we will assume only the mode bits will be passed
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@@ -824,7 +820,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
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task->thread.dbcr0 |= DBSR_DAC1W;
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task->thread.regs->msr |= MSR_DE;
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-#endif
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+#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
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return 0;
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}
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